Datasheet

STM8S105xx
Electrical characteristics
Notes:
(1)
Data based on characterization results, not tested in production
(2)
Configured by the REGAH bit in the CLK_ICKR register.
(3)
Configured by the AHALT bit in the FLASH_CR1 register.
Table 26: Total current consumption in active halt mode at VDD = 3.3 V
Symbol Parameter Conditions Typ Max
at 85
°C
(1)
Max
at 125
°C
(1)
Unit
Main voltage
regulator
(MVR)
(2)
Flash
mode
(3)
Clock
source
I
DD(AH)
Supply current
in active halt
mode
On Operating
mode
HSE
crystal
osc.
(16 MHz)
680 µA
LSI RC
osc. (128
kHz)
200 320 400
Power-
down
mode
HSE
crystal
osc.
(16 MHz)
630
LSI RC
osc. (128
kHz)
140 270 350
Off Operating
mode
LSI RC
osc. (128
kHz)
66 120 220
Power-
down
mode
10 60 150
Notes:
(1)
Data based on characterization results, not tested in production.
(2)
Configured by the REGAH bit in the CLK_ICKR register.
(3)
Configured by the AHALT bit in the FLASH_CR1 register.
10.3.2.4 Total current consumption in halt mode
Table 27: Total current consumption in halt mode at VDD = 5 V
Symbol Parameter Conditions Typ Max at
85 °C
(1)
Max at
125 °C
(1)
Unit
I
DD(H)
Supply current in
halt mode
Flash in operating mode, HSI
clock after wakeup
62 90 150 µA
Flash in powerdown mode,
HSI clock after wakeup
6.5 25 80
Notes:
(1)
Data based on characterization results, not tested in production.
DocID14771 Rev 13 51/99