Datasheet

Electrical characteristics
STM8S105xx
Figure 11: fCPUmax versus VDD
Table 20: Operating conditions at power-up/power-down
Symbol Parameter Conditions Min Typ Max Unit
t
VDD
V
DD
rise time rate 2.0
(1)
∞ µs/V
V
DD
fall time rate 2.0
(1)
∞
t
TEMP
Reset releasedelay V
DD
rising 1.7
(1)
ms
V
IT+
Power-on reset threshold 2.65 2.8 2.95 V
V
IT-
Brown-out reset threshold 2.58 2.7 2.88
V
HYS(BOR)
Brown-out reset hysteresis 70 mV
Notes:
(1)
Guaranteed by design, not tested in production.
10.3.1 VCAP external capacitor
Stabilization for the main regulator is achieved connecting an external capacitor C
EXT
to the
V
CAP
pin. C
EXT
is specified in the Operating conditions section. Care should be taken to limit
the series inductance to less than 15 nH.
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