Datasheet

Memory and register map
STM8S105xx
6.2.3 CPU/SWIM/debug module/interrupt controller registers
Table 10: CPU/SWIM/debug module/interrupt controller registers
Address Block Register
label
Register name Reset
status
0x00 7F00 CPU
(1)
A Accumulator 0x00
0x00 7F01 PCE Program counter extended 0x00
0x00 7F02 PCH Program counter high 0x00
0x00 7F03 PCL Program counter low 0x00
0x00 7F04 XH X index register high 0x00
0x00 7F05 XL X index register low 0x00
0x00 7F06 YH Y index register high 0x00
0x00 7F07 YL Y index register low 0x00
0x00 7F08 SPH Stack pointer high 0x07
0x00 7F09 SPL Stack pointer low 0xFF
0x00 7F0A CCR Condition code register 0x28
0x00 7F0B to 0x00
7F5F
Reserved area (85 bytes)
0x00 7F60 CPU CFG_GCR Global configuration register 0x00
0x00 7F70 ITC ITC_SPR1 Interrupt software priority register 1 0xFF
0x00 7F71 ITC_SPR2 Interrupt software priority register 2 0xFF
0x00 7F72 ITC_SPR3 Interrupt software priority register 3 0xFF
0x00 7F73 ITC_SPR4 Interrupt software priority register 4 0xFF
0x00 7F74 ITC_SPR5 Interrupt software priority register 5 0xFF
0x00 7F75 ITC_SPR6 Interrupt software priority register 6 0xFF
0x00 7F76 ITC_SPR7 Interrupt software priority register 7 0xFF
0x00 7F77 ITC_SPR8 Interrupt software priority register 8 0xFF
0x00 7F78 to 0x00
7F79
Reserved area (2 bytes)
0x00 7F80 SWIM SWIM_CSR SWIM control status register 0x00
0x00 7F81 to 0x00
7F8F
Reserved area (15 bytes)
0x00 7F90 DM DM_BK1RE DM breakpoint 1 register extended
byte
0xFF
0x00 7F91 DM_BK1RH DM breakpoint 1 register high byte 0xFF
0x00 7F92 DM_BK1RL DM breakpoint 1 register low byte 0xFF
0x00 7F93 DM_BK2RE DM breakpoint 2 register extended
byte
0xFF
0x00 7F94 DM_BK2RH DM breakpoint 2 register high byte 0xFF
0x00 7F95 DM_BK2RL DM breakpoint 2 register low byte 0xFF
0x00 7F96 DM_CR1 DM debug module control 0x00
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