Datasheet

STM8S105xx
Memory and register map
Address Block Register label Register name Reset status
0x00 501A PF_IDR Port F input pin value register 0xXX
0x00 501B PF_DDR Port F data direction register 0x00
0x00 501C PF_CR1 Port F control register 1 0x00
0x00 501D PF_CR2 Port F control register 2 0x00
0x00 501E Port G PG_ODR Port G data output latch register 0x00
0x00 501F PG_IDR Port G input pin value register 0xXX
0x00 5020 PG_DDR Port G data direction register 0x00
0x00 5021 PG_CR1 Port G control register 1 0x00
0x00 5022 PG_CR2 Port G control register 2 0x00
0x00 5023 Port H PH_ODR Port H data output latch register 0x00
0x00 5024 PH_IDR Port H input pin value register 0xXX
0x00 5025 PH_DDR Port H data direction register 0x00
0x00 5026 PH_CR1 Port H control register 1 0x00
0x00 5027 PH_CR2 Port H control register 2 0x00
0x00 5028 Port I PI_ODR Port I data output latch register 0x00
0x00 5029 PI_IDR Port I input pin value register 0xXX
0x00 502A PI_DDR Port I data direction register 0x00
0x00 502B PI_CR1 Port I control register 1 0x00
0x00 502C PI_CR2 Port I control register 2 0x00
6.2.2 General hardware register map
Table 9: General hardware register map
Address Block Register label Register name Reset
status
0x00 5050 to
0x00 5059
Reserved area (10 bytes)
0x00 505A Flash FLASH_CR1 Flash control register 1 0x00
0x00 505B FLASH_CR2 Flash control register 2 0x00
0x00 505C FLASH_NCR2 Flash complementary control
register 2
0xFF
0x00 505D FLASH _FPR Flash protection register 0x00
0x00 505E FLASH _NFPR Flash complementary protection
register
0xFF
0x00 505F FLASH _IAPSR Flash in-application programming
status register
0x00
0x00 5060 to
0x00 5061
Reserved area (2 bytes)
0x00 5062 Flash FLASH _PUKR Flash program memory
unprotection register
0x00
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