Datasheet
Contents
STM8S105xx
Contents
1 Introduction ....................................................................................... 8
2 Description ........................................................................................ 9
3 Block diagram ................................................................................. 10
4 Product overview ............................................................................ 11
4.1 Single wire interface module (SWIM) and debug module (DM) ....... 11
4.2 Interrupt controller ........................................................................... 12
4.3 Flash program and data EEPROM memory .................................... 12
4.4 Clock controller ............................................................................... 13
4.5 Power management ........................................................................ 14
4.6 Watchdog timers ............................................................................. 14
4.7 Auto wakeup counter ...................................................................... 15
4.8 Beeper ............................................................................................ 15
4.9 TIM1 - 16-bit advanced control timer ............................................... 15
4.10 TIM2, TIM3 - 16-bit general purpose timers .................................... 15
4.11 TIM4 - 8-bit basic timer ................................................................... 16
4.12 Analog-to-digital converter (ADC1) ................................................. 16
4.13 Communication interfaces ............................................................... 17
4.13.1 UART2 .............................................................................................. 17
4.13.2 SPI .................................................................................................... 17
4.13.3 I²C ..................................................................................................... 18
5 Pinout and pin description ............................................................ 19
5.1 STM8S105 pinouts and pin description ........................................... 19
5.1.1 Alternate function remapping ........................................................... 24
6 Memory and register map .............................................................. 25
6.1 Memory map ................................................................................... 25
6.2 Register map ................................................................................... 26
6.2.1 I/O port hardware register map ........................................................ 26
6.2.2 General hardware register map ........................................................ 27
6.2.3 CPU/SWIM/debug module/interrupt controller registers .................. 34
7 Interrupt vector mapping ............................................................... 36
8 Option bytes .................................................................................... 37
9 Unique ID ......................................................................................... 41
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