Datasheet

STM8S105xx
Product overview
4.13 Communication interfaces
The following communication interfaces are implemented:
• UART2: Full feature UART, synchronous mode, SPI master mode, Smartcard mode,
IrDA mode, LIN2.1 master/slave capability
• SPI : Full and half-duplex, 8 Mbit/s
• I²C: Up to 400 Kbit/s
4.13.1 UART2
Main features
• One Mbit/s full duplex SCI
• SPI emulation
• High precision baud rate generator
• Smartcard emulation
• IrDA SIR encoder decoder
• LIN master mode
• LIN slave mode
Asynchronous communication (UART mode)
• Full duplex communication - NRZ standard format (mark/space)
• Programmable transmit and receive baud rates up to 1 Mbit/s (f
CPU
/16) and capable of
following any standard baud rate regardless of the input frequency
• Separate enable bits for transmitter and receiver
• Two receiver wakeup modes:
− Address bit (MSB)
− Idle line (interrupt)
• Transmission error detection with interrupt generation
• Parity control
Synchronous communication
• Full duplex synchronous transfers
• SPI master operation
• 8-bit data communication
• Maximum speed: 1 Mbit/s at 16 MHz (f
CPU
/16)
LIN master mode
• Emission: Generates 13-bit synch break frame
• Reception: Detects 11-bit break frame
LIN slave mode
• Autonomous header handling - one single interrupt per valid message header
• Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
• Synch delimiter checking
• 11-bit LIN synch break detection - break detection always active
• Parity check on the LIN identifier field
• LIN error management
• Hot plugging support
4.13.2 SPI
• Maximum speed: 8 Mbit/s (f
MASTER
/2) both for master and slave
• Full duplex synchronous transfers
DocID14771 Rev 13 17/99