Datasheet

Product overview
STM8S105xx
• Startup clock: After reset, the microcontroller restarts by default with an internal 2
MHz clock (HSI/8). The prescaler ratio and clock source can be changed by the
application program as soon as the code execution starts.
• Clock security system (CSS): This feature can be enabled by software. If an HSE
clock failure occurs, the internal RC (16 MHz/8) is automatically selected by the CSS
and an interrupt can optionally be generated.
• Configurable main clock output (CCO): This outputs an external clock for use by
the application.
Table 3: Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers
Bit Peripheral
clock
Bit Peripheral
clock
Bit Peripheral
clock
Bit Peripheral
clock
PCKEN17 TIM1 PCKEN13 UART2 PCKEN27 Reserved PCKEN23 ADC
PCKEN16 TIM3 PCKEN12 Reserved PCKEN26 Reserved PCKEN22 AWU
PCKEN15 TIM2 PCKEN11 SPI PCKEN25 Reserved PCKEN21 Reserved
PCKEN14 TIM4 PCKEN10 I
2
C PCKEN24 Reserved PCKEN20 Reserved
4.5 Power management
For efficient power management, the application can be put in one of four different low-
power modes. You can configure each mode to obtain the best compromise between
lowest power consumption, fastest start-up time and available wakeup sources.
• Wait mode: In this mode, the CPU is stopped, but peripherals are kept running. The
wakeup is performed by an internal or external interrupt or reset.
• Active halt mode with regulator on: In this mode, the CPU and peripheral clocks are
stopped. An internal wakeup is generated at programmable intervals by the auto wake
up unit (AWU). The main voltage regulator is kept powered on, so current
consumption is higher than in active halt mode with regulator off, but the wakeup time
is faster. Wakeup is triggered by the internal AWU interrupt, external interrupt or reset.
• Active halt mode with regulator off: This mode is the same as active halt with
regulator on, except that the main voltage regulator is powered off, so the wake up
time is slower.
• Halt mode :In this mode the microcontroller uses the least power. The CPU and
peripheral clocks are stopped, the main voltage regulator is powered off. Wakeup is
triggered by external event or reset.
4.6 Watchdog timers
The watchdog system is based on two independent timers providing maximum security to
the applications.
Activation of the watchdog timers is controlled by option bytes or by software. Once
activated, the watchdogs cannot be disabled by the user program without performing a
reset.
Window watchdog timer
The window watchdog is used to detect the occurrence of a software fault, usually
generated by external interferences or by unexpected logical conditions, which cause the
application program to abandon its normal sequence.
The window function can be used to trim the watchdog behavior to match the application
perfectly.
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