Datasheet

STM8S105xx
Product overview
Figure 2: Flash memory organization
Read-out protection (ROP)
The read-out protection blocks reading and writing the Flash program memory and data
EEPROM memory in ICP mode (and debug mode). Once the read-out protection is
activated, any attempt to toggle its status triggers a global erase of the program and data
memory. Even if no protection can be considered as totally unbreakable, the feature
provides a very high level of protection for a general purpose microcontroller.
4.4 Clock controller
The clock controller distributes the system clock (f
MASTER
) coming from different oscillators
to the core and the peripherals. It also manages clock gating for low power modes and
ensures clock robustness.
Features
• Clock prescaler: To get the best compromise between speed and current
consumption the clock frequency to the CPU and peripherals can be adjusted by a
programmable prescaler.
• Safe clock switching: Clock sources can be changed safely on the fly in run mode
through a configuration register. The clock signal is not switched until the new clock
source is ready. The design guarantees glitch-free switching.
• Clock management: To reduce power consumption, the clock controller can stop the
clock to the core, individual peripherals or memory.
• Master clock sources: Four different clock sources can be used to drive the master
clock:
− 1-16 MHz high-speed external crystal (HSE)
− Up to 16 MHz high-speed user-external clock (HSE user-ext)
− 16 MHz high-speed internal RC oscillator (HSI)
− 128 kHz low-speed internal RC (LSI)
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