Datasheet

DocID018576 Rev 5 57/103
STM8S003F3 STM8S003K3 Electrical characteristics
87
Total current consumption and timing in forced reset state
Current consumption of on-chip peripherals
Subject to general operating conditions for V
DD
and T
A
.
HSI internal RC/f
CPU
= f
MASTER
= 16 MHz.
Table 30. Total current consumption and timing in forced reset state
Symbol Parameter Conditions Typ Max
(1)
Unit
I
DD(R)
Supply current in reset state
(2)
V
DD
= 5 V 400 -
µA
V
DD
= 3.3 V 300 -
t
RESETBL
Reset release to bootloader vector
fetch
--150µs
1. Data guaranteed by design, not tested in production.
2. Characterized with all I/Os tied to V
SS
.
Table 31. Peripheral current consumption
Symbol Parameter Typ. Unit
I
DD(TIM1)
TIM1 supply current
(1)
1. Data based on a differential I
DD
measurement between reset configuration and timer counter running at
16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production.
210
µA
I
DD(TIM2)
TIM2 supply current
(1)
130
I
DD(TIM4)
TIM4 timer supply current
(1)
50
I
DD(UART1)
UART1 supply current
(2)
2. Data based on a differential I
DD
measurement between the on-chip peripheral when kept under reset and
not clocked and the on-chip peripheral when clocked and not kept under reset. No I/O pads toggling. Not
tested in production.
120
I
DD(SPI)
SPI supply current
(2)
45
I
DD(I2C)
I
2
C supply current
(2)
65
I
DD(ADC1)
ADC1 supply current when converting
(3)
3. Data based on a differential I
DD
measurement between reset configuration and continuous A/D
conversions. Not tested in production.
1000