Datasheet

DS7147 Rev 10 101/103
STM8S003F3 STM8S003K3 Revision history
102
13 Revision history
Table 56. Document revision history
Date Revision Changes
12-Jul-2011 1 Initial release.
09-Jan-2012 2
Added N
RW
and t
RET
for data EEPROM in Table:
Flash program memory and data EEPROM.
Updated R
PU
in Table: NRST pin characteristics
and Table: I/O static characteristics.
Updated notes related to V
CAP
in Table: General
operating conditions.
12-Jun-2012 3
Updated temperature condition for factory calibrated
ACC
HSI
in Table: HSI oscillator characteristics.
Changed SCK input to SCK output in Figure: SPI timing
diagram - master mode.
Modified Figure: 20-lead, ultra thin, fine pitch quad flat
no-lead package outline (3 x 3) to add the package top
view.
18-Dec-2014 4
Updated the package information for the 20-pin TSSOP
and the 20-pin UFQFPN.
21-Apr-2015 5
Added package marking examples in Section: Package
information:
– Figure: LQFP32 marking example (package top view),
– Figure: TSSOP20 marking example (package top
view),
– Figure: UFQFPN20 marking example (package top
view).
26-Jun-2015 6
Addition of the footnotes about D and E1 dimensions to
Table 53: TSSOP20 – 20-lead thin shrink small outline,
6.5 x 4.4 mm, 0.65 mm pitch, package mechanical data.
Update of the standard for EMI characteristics in
Section : Electromagnetic interference (EMI).
23-Sep-2015 7
Correction of UART peripheral in Figure 1:
STM8S003F3/K3 value line block diagram.
20-Apr-2016 8
Corrected text strings in Figure 10: External capacitor
C
EXT
and Figure 37: Recommended reset pin protection
PB4 line PP column value corrected in Table 5:
STM8S003K3 descriptions
PD1 line “floating” and “wpu” column values corrected in
Table 6: STM8S003F3 pin description
SPI_RXCRCR and SPI_TXCRCR reset values
corrected in Table 9: General hardware register map