Datasheet

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STM8S001J3 Electrical characteristics
75
Total current consumption and timing in forced reset state
Current consumption of on-chip peripherals
Subject to general operating conditions for V
DD
and T
A
.
HSI internal RC/f
CPU
= f
MASTER
= 16 MHz, VDD = 5 V.
Table 28. Total current consumption and timing in forced reset state
Symbol Parameter Conditions Typ Max
(1)
Unit
I
DD(R)
Supply current in reset state
(2)
V
DD
= 5 V 400 -
µA
V
DD
= 3.3 V 300 -
t
RESETBL
Reset release to vector fetch - - 150 µs
1. Guaranteed by design.
2. Characterized with all I/Os tied to V
SS
.
Table 29. Peripheral current consumption
Symbol Parameter Typ. Unit
I
DD(TIM1)
TIM1 supply current
(1)
1. Data based on a differential I
DD
measurement between reset configuration and timer counter running at
16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production.
210
µA
I
DD(TIM2)
TIM2 supply current
(1)
130
I
DD(TIM4)
TIM4 timer supply current
(1)
50
I
DD(UART1)
UART1 supply current
(1)
120
I
DD(SPI)
SPI supply current
(1)
45
I
DD(I2C)
I2C supply current
(1)
65
I
DD(ADC1)
ADC1 supply current when converting
(1)
1000
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