Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 8bit 8KB SOP

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STM8S001J3 Memory and register map

Table 6 lists the boundary addresses for each memory size. The top of the stack is at the

RAM end address in each case.

6.2 Register map

6.2.1 I/O port hardware register map

Table 6. Flash, Data EEPROM and RAM boundary addresses

Memory area Size (byte) Start address End address

Flash program memory 8 K 0x00 8000 0x00 9FFF

RAM 1 K 0x00 0000 0x00 03FF

Data EEPROM 128 0x00 4000 0x00 407F

Table 7. I/O port hardware register map

Address Block Register label Register name

Reset

status

0x00 5000

Port A

PA_ODR Port A data output latch register 0x00

0x00 5001 PA_IDR Port A input pin value register 0xXX

(1)

0x00 5002 PA_DDR Port A data direction register 0x00

0x00 5003 PA_CR1 Port A control register 1 0x00

0x00 5004 PA_CR2 Port A control register 2 0x00

0x00 5005

Port B

PB_ODR Port B data output latch register 0x00

0x00 5006 PB_IDR Port B input pin value register 0xXX

(1)

0x00 5007 PB_DDR Port B data direction register 0x00

0x00 5008 PB_CR1 Port B control register 1 0x00

0x00 5009 PB_CR2 Port B control register 2 0x00

0x00 500A

Port C

PC_ODR Port C data output latch register 0x00

0x00 500B PB_IDR Port C input pin value register 0xXX

(1)

0x00 500C PC_DDR Port C data direction register 0x00

0x00 500D PC_CR1 Port C control register 1 0x00

0x00 500E PC_CR2 Port C control register 2 0x00

0x00 500F

Port D

PD_ODR Port D data output latch register 0x00

0x00 5010 PD_IDR Port D input pin value register 0xXX

(1)

0x00 5011 PD_DDR Port D data direction register 0x00

0x00 5012 PD_CR1 Port D control register 1 0x02

0x00 5013 PD_CR2 Port D control register 2 0x00

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