Datasheet

Electrical parameters STM8L050J3
84/94 DS12167 Rev 4
Figure 30. ADC1 accuracy characteristics
Figure 31. Typical connection diagram using the ADC
1. Refer to Table 48 for the values of R
AIN
and C
ADC
.
2. C
parasitic
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7
pF). A high C
parasitic
value will downgrade conversion accuracy. To remedy
this, f
ADC
should be reduced.
Figure 32. Maximum dynamic current consumption on V
REF+
supply pin during ADC
conversion
ai17090f
STM8
I
L
± 50nA
12-bit
converter
Sample and hold ADC
converter
V
AIN
R
AIN
(1)
AINx
V
DD
V
T
0.6V
V
T
0.6V
C
parasitic
(2)
R
ADC
C
ADC
(1)
MS46324V1
Sampling
(n cycles)
Conversion (12 cycles)
ADC clock
I ref+
700 μA
300 μA
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