Datasheet

Introduction STM8L050J3
8/94 DS12167 Rev 4
1 Introduction
This document describes the features, pinout, mechanical data and ordering information for
the STM8L050J3 microcontroller with 8-Kbyte Flash memory.
For further details on the STMicroelectronics low density family please refer to Section 2.2:
Ultra-low-power continuum.
For detailed information on device operation and registers, refer to the STM8L050J3,
STM8L051F3, STM8L052C6, STM8L052R8 MCUs and STM8L151/L152, STM8L162,
STM8AL31, STM8AL3L lines reference manual (RM0031).
For information on to the Flash program memory and data EEPROM, refer to the How to
program STM8L and STM8AL Flash program memory and data EEPROM programming
manual (PM0054).
For information on the debug module and SWIM (single wire interface module), refer to the
STM8 SWIM communication protocol and debug module user manual (UM0470).
For information on the STM8 core, refer to the STM8 CPU programming manual (PM0044).
The low density value line devices, like STM8L050J3, provide the following benefits:
Integrated system
8 Kbytes of low-density embedded Flash program memory
256 bytes of data EEPROM
1 Kbyte of RAM
Internal high-speed and low-power low speed RC
Embedded reset
Ultra-low-power consumption
1 µA in Active-halt mode
Clock gated system and optimized power management
Capability to execute from RAM for Low-power wait mode and Low-power run
mode
Advanced features
Up to 16 MIPS at 16 MHz CPU clock frequency
Direct memory access (DMA) for memory-to-memory or peripheral-to-memory
access
Short development cycles
Application scalability across a common family product architecture with
compatible pinout, memory map and modular peripherals
Wide choice of development tools
These features make STM8L050J3 suitable for a wide range of consumer and mass market
applications.
Refer to Table 1: STM8050J3 features and peripheral counts and Section 3: Functional
overview for an overview of the complete range of peripherals proposed in this family.
Figure 1 shows STM8L050J3 block diagram.
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