Datasheet

DS12167 Rev 4 69/94
STM8L050J3 Electrical parameters
87
Table 35. I/O static characteristics
Symbol Parameter
Conditions
(1)
Min
Typ
Max Unit
V
IL
Input low level voltage
(2)
Input voltage on true open-drain
pins (PC0 and PC1)
V
SS
-0.3
-
0.3 x V
DD
V
Input voltage on any other pin
V
SS
-0.3
-
0.3 x V
DD
V
IH
Input high level voltage
(2)
Input voltage on any other pin
0.70 x V
DD
-
V
DD
+0.3
V
V
hys
Schmitt trigger voltage
hysteresis
(3)
I/Os - 200 -
mV
True open drain I/Os - 200 -
I
lkg
Input leakage current
(4)
V
SS
≤ V
IN
≤ V
DD
High sink I/Os
--50
(5)
nA
V
SS
≤ V
IN
≤ V
DD
True open drain I/Os
- - 200
(5)
V
SS
≤ V
IN
≤ V
DD
PA0 with high sink LED driver
capability
- - 200
(5)
R
PU
Weak pull-up equivalent
resistor
(2)(6)
V
IN
= V
SS
30 45 60 kΩ
C
IO
I/O pin capacitance - -
5
(7)
-pF
1. V
DD
= 3.0 V, T
A
= -40 to 125 °C unless otherwise specified.
2. Guaranteed by characterization results.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. The max. value may be exceeded if negative current is injected on adjacent pins.
5. Not tested in production.
6. R
PU
pull-up equivalent resistor based on a resistive transistor (corresponding I
PU
current characteristics described in
Figure 19).
7. Capacitance per one GPIO on pin. Complete pin capacitance depends on how many GPIOs are connected on a given pin
(see Table 4). The total pin capacitance is then N x C
IO
where N = number of GPIOs on a given pin).
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