Datasheet

STM32L496xx Pinouts and pin description
DS11585 Rev 9 75/272
23 J7 G6 32 J5
J5
43 43 L4 L4 PA7 I/O FT_fla
(3)
TIM1_CH1N, TIM3_CH2, TIM8_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, LCD_SEG4, TIM17_CH1, EVENTOUT
OPAMP2_VINM, ADC12_IN12
24 H6 K8 33 K5
K5
44 44 H5 H5 PC4 I/O FT_la -
USART3_TX, QUADSPI_BK2_IO3, LCD_SEG22, EVENTOUT
COMP1_INM, ADC12_IN13
25 K8 - 34 L5
L5
45 45 J5 J5 PC5 I/O FT_la -
USART3_RX, LCD_SEG23, EVENTOUT
COMP1_INP, ADC12_IN14, WKUP5
26 J6 H6 35 M5
M5
46 46 K5 K5 PB0 I/O TT_la -
TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, LCD_SEG5, COMP1_OUT, SAI1_EXTCLK, EVENTOUT
OPAMP2_VOUT, ADC12_IN15
27 K7 K7 36 M6
M6
47 47 L5 L5 PB1 I/O FT_la -
TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6, LPTIM2_IN1, EVENTOUT
COMP1_INM, ADC12_IN16
28 F5 J6 37 L6
L6
48 48 N5 N5 PB2 I/O FT_la -
RTC_OUT, LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0, LCD_VLCD, EVENTOUT
COMP1_INP
----K6
K6
49 49 M5 M5 PF11 I/O FT - DCMI_D12, EVENTOUT -
----J7
J7
50 50 N6 N6 PF12 I/O FT - FMC_A6, EVENTOUT -
Table 15. STM32L496xx pin definitions (continued)
Pin Number
Pin name
(function after
reset)
Pin type
I/O structure
Notes
Pin functions
LQFP64
WLCSP100
WLCSP100_SMPS
LQFP100
UFBGA132
UFBGA132_SMPS
LQFP144
LQFP144_SMPS
UFBGA169
UFBGA169_SMPS
Alternate functions Additional functions
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