Datasheet

Functional overview STM32L496xx
36/272 DS11585 Rev 9
CSS
CPU (hard fault)
RAM (parity error)
Flash memory (ECC error)
COMPx
PVD
DFSDM1 (analog
watchdog, short circuit
detection)
TIM1,8
TIM15,16,17
Timer break Y Y Y Y - -
GPIO
TIMx External trigger Y Y Y Y - -
LPTIMERx External trigger Y Y Y Y Y
Y
(1)
ADCx
DAC1
DFSDM1
Conversion external trigger Y Y Y Y - -
1. LPTIM1 only.
Table 6. STM32L496xx peripherals interconnect matrix (continued)
Interconnect source
Interconnect
destination
Interconnect action
Run
Sleep
Low-power run
Low-power sleep
Stop 0 / Stop 1
Stop 2
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