Datasheet
Electrical characteristics STM32L496xx
212/272 DS11585 Rev 9
Figure 37. SPI timing diagram - slave mode and CPHA = 1
1. Measurement points are done at CMOS levels: 0.3 V
DD
and 0.7 V
DD
.
Figure 38. SPI timing diagram - master mode
1. Measurement points are done at CMOS levels: 0.3 V
DD
and 0.7 V
DD
.
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