Datasheet
DS10969 Rev 5 59/204
STM32L475xx Pinouts and pin description
84
Figure 7. STM32L475Rx LQFP64 pinout
(1)
1. The above figure shows the package top view.
MS31272V5
LQFP64
1
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
VBAT
PC14-OSC32_IN (PC14)
PC15-OSC32_OUT (PC15)
PH0-OSC_IN (PH0)
PH1-OSC_OUT (PH1)
NRST
PC0
PC1
PC2
PC3
VSSA/VREF-
VDDA/VREF+
PA0
PA1
PA2
PC13
48
46
45
44
43
42
41
40
39
38
37
36
35
34
33
47
55
53
52
51
50
49
56
54
61
59
57
64
63
62
60
58
26
28
29
30
31
32
25
27
20
22
24
17
18
19
21
23
PA3
VSS
PA5
PC4
PB2
VDD
PA4
PC5
PB11
PA6
PA7
VSS
PB0
PB1
PB10
VDD
VDDUSB
PA13 (JTMS-SWDIO)
PA12
PA11
PA10
PA9
PA8
PC9
PC8
PC7
PC6
PB15
PB14
PB13
PB12
VSS
VDD
VSS
BOOT0
PB5
PC12
PB9
PB8
PB4 (NJTRST)
PC10
PB7
PB6
PA15 (JTDI)
PB3 (JTDO-TRACESWO)
PD2
PC11
PA14 (JTCK-SWCLK)
Table 15. Legend/abbreviations used in the pinout table
Name Abbreviation Definition
Pin name
Unless otherwise specified in brackets below the pin name, the pin function during and after
reset is the same as the actual pin name
Pin type
S Supply pin
I Input only pin
I/O Input / output pin
I/O structure
FT 5 V tolerant I/O
TT 3.6 V tolerant I/O
B Dedicated BOOT0 pin
RST Bidirectional reset pin with embedded weak pull-up resistor
Option for TT or FT I/Os
_f
(1)
I/O, Fm+ capable
_u
(2)
I/O, with USB function supplied by V
DDUSB
_a
(3)
I/O, with Analog switch function supplied by V
DDA
Notes Unless otherwise specified by a note, all I/Os are set as analog inputs during and after reset.
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