Datasheet

Functional overview STM32L475xx
20/204 DS10969 Rev 5
Figure 2. Power supply overview
During power-up and power-down phases, the following power sequence requirements
must be respected:
• When V
DD
is below 1 V, other power supplies (V
DDA
, V
DDUSB
) must remain below V
DD
+ 300 mV.
• When V
DD
is above 1 V, all power supplies are independent.
During the power-down phase, V
DD
can temporarily become lower than other supplies only
if the energy provided to the MCU remains below 1
mJ; this allows external decoupling
capacitors to be discharged with different time constants during the power-down transient
phase.
MSv37694V3
Backup domain
Standby circuitry
(Wakeup logic,
IWDG)
Voltage regulator
Core
SRAM1
SRAM2
Digital
peripherals
Low voltage detector
LSE crystal 32 K osc
BKP registers
RCC BDCR register
RTC
I/O ring
V
CORE
domain
Temp. sensor
Reset block
2 x PLL, HSI, MSI,
HSI48
Flash memory
V
DDIO1
V
DD
domain
V
CORE
V
SS
V
DD
V
BAT
V
DDA
domain
2 x D/A converters
1 x A/D converters
2 x comparators
1 x operational amplifier
Voltage reference buffer
USB transceivers
V
DDUSB
V
DDA
V
SSA
V
SS
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