Datasheet

DS10969 Rev 5 15/204
STM32L475xx Description
57
Figure 1. STM32L475xx block diagram
Note: AF: alternate function on I/O pins.
MSv37693V3
Flash
up to
1 MB
GPIO PORT A
AHB/APB2
EXT IT. WKUP
114 AF
PA[15:0]
TIM1 / PWM
3 compl. channels (TIM1_CH[1:3]N),
4 channels (TIM1_CH[1:4]),
ETR, BKIN, BKIN2 as AF
USART1
RX, TX, CK,CTS,
RTS as AF
SPI1
MOSI, MISO,
SCK, NSS as AF
APB260 M Hz
APB1 30MHz
OUT1
ITF
WWDG
RTC_TS
OSC32_IN
OSC32_OUT
smcard
IrDA
16b
SDIO / MMC
D[7:0]
CMD, CK as AF
VBAT = 1.55 to 3.6 V
JTAG & SW
ARM Cortex-M4
80 MHz
FPU
NVIC
ETM
MPU
DMA2
ART
ACCEL/
CACHE
FIFO
@ VDDA
BOR
Supply
supervision
PVD, PVM
Int
reset
XTAL 32 kHz
MAN AGT
RTC
FCLK
Standby
interface
IWDG
@VBAT
@ VDD
@VDD
AWU
Reset & clock
control
PCLKx
Voltage
regulator
3.3 to 1.2 V
VDD
Power management
@ VDD
RTC_TAMPx
Backup register
AHB bus-matrix
TIM15
2 channels,
1 compl. channel, BKIN as AF
DAC1
DAC2
TIM6
TIM7
D-BUS
APB1 80 MHz (max)
SRAM 96 KB
SRAM 32 KB
I-BUS
S-BUS
DMA1
PB[15:0]
PC[15:0]
PD[15:0]
PE[15:0]
PH[1:0]
GPIO PORT B
GPIO PORT C
GPIO PORT D
GPIO PORT E
GPIO PORT H
TIM8 / PWM
16b
16b
TIM16
16b
TIM17
16b
3 compl. channels (TIM1_CH[1:3]N),
4 channels (TIM1_CH[1:4]),
ETR, BKIN, BKIN2 as AF
1 channel,
1 compl. channel, BKIN as AF
1 channel,
1 compl. channel, BKIN as AF
OUT2
16b
16b
AHB/APB1
OSC_IN
OSC_OUT
HCLKx
XTAL OSC
4- 16MHz
16 analog inputs
common
to the 2 ADCs
VREF+
USAR T 2MBps
Temperature sensor
@ VDDA
SAI1
MCLK_A, SD_A, FS_A, SCK_A, EXTCLK
MCLK_B, SD_B, FS_B, SCK_B as AF
SAI2
MCLK_A, SD_A, FS_A, SCK_A, EXTCLK
MCLK_B, SD_B, FS_B, SCK_B as AF
DFSDM
SDCKIN[7:0], SDDATIN[7:0],
SDCKOUT,SDTRIG as AF
Touch sensing controller
7 Groups of
3 channels max as AF
RC HSI
RC LSI
PLL 1&2&3
MSI
COMP1
INP, INM, OUT
COMP2
INP, INM, OUT
@ VDDA
RTC_OUT
AHB1 80 MHz
CRC
APB2 80MHz
AHB2 80 MHz
Firewall
VREF Buffer
@ VDDA
@ VDD
VDD = 1.71 to 3.6 V
VSS
VDDA, VSSA
VDD, VSS, NRST
VDDUSB
TRACECLK
TRACED[3:0]
NJTRST, JTDI,
JTCK/SWCLK
JTDO/SWD, JTDO
TIM2
32b
4 channels, ETR as AF
TIM3
16b
4 channels, ETR as AF
TIM4
16b
4 channels, ETR as AF
TIM5
32b
4 channels
USART2
RX, TX, CK, CTS, RTS as AF
smcard
IrDA
USART3
RX, TX, CK, CTS, RTS as AF
smcard
IrDA
RX, TX, CTS, RTS as AF
UART4
RX, TX, CTS, RTS as AF
UART5
MOSI, MISO, SCK, NSS as AF
SP2
MOSI, MISO, SCK, NSS as AF
SP3
I2C1/SMBUS
SCL, SDA, SMBA as AF
SCL, SDA, SMBA as AF
I2C2/SMBUS
SCL, SDA, SMBA as AF
I2C3/SMBUS
FIFO
TX, RX as AF
bxCAN1
VOUT, VINM, VINP
OpAmp1
OpAmp2
@VDDA
VOUT, VINM, VINP
LPUART1
RX, TX, CTS, RTS as AF
SWPMI1
IO
RX, TX, SUSPEND as AF
LPTIM1
IN1, IN2, OUT, ETR as AF
LPTIM2
IN1, OUT, ETR as AF
RNG
Flexible static memory controller (FSMC):
SRAM, PSRAM, NOR Flash,
NAND Flash
CLK, NE1, NL, NBL[1:0],
A[23:16], D[15:0], NOE, NWE,
NWAIT as AF
Quad SPI memory interface
BK1_IO[3:0]
CLK
NCS
ITF
ADC2
ADC1
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