Datasheet
Electrical characteristics STM32L452xx
178/210 DocID029968 Rev 3
Figure 32. SPI timing diagram - slave mode and CPHA = 1
1. Measurement points are done at CMOS levels: 0.3 V
DD
and 0.7 V
DD
.
Figure 33. SPI timing diagram - master mode
1. Measurement points are done at CMOS levels: 0.3 V
DD
and 0.7 V
DD
.
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