Datasheet

Electrical characteristics STM32L431xx
162/200 DocID028800 Rev 1
Table 84. QUADSPI characteristics in DDR mode
(1)
Symbol Parameter Conditions Min Typ Max Unit
F
CK
1/t
(CK)
Quad SPI clock
frequency
1.71 < V
DD
< 3.6 V, C
LOAD
= 20 pF
Voltage Range 1
--40
MHz
2 < V
DD
< 3.6 V, C
LOAD
= 20 pF
Voltage Range 1
--48
1.71 < V
DD
< 3.6 V, C
LOAD
= 15 pF
Voltage Range 1
--48
1.71 < V
DD
< 3.6 V C
LOAD
= 20 pF
Voltage Range 2
--26
t
w(CKH)
Quad SPI clock high
and low time
f
AHBCLK
= 48 MHz, presc=0
t
(CK)
/2-2 - t
(CK)
/2
ns
t
w(CKL)
t
(CK)
/2 - t
(CK)
/2+2
t
sr(IN)
Data input setup time
on rising edge
Voltage Range 1 1
--
Voltage Range 2 3.5
t
sf(IN)
Data input setup time
on falling edge
Voltage Range 1 1
--
Voltage Range 2 1.5
t
hr(IN)
Data input hold time
on rising edge
Voltage Range 1 6
--
Voltage Range 2 6.5
t
hf(IN)
Data input hold time
on falling edge
Voltage Range 1 5.5
--
Voltage Range 2 5.5
t
vr(OUT)
Data output valid time
on rising edge
Voltage Range 1
-
55.5
Voltage Range 2 9.5 14
t
vf(OUT)
Data output valid time
on falling edge
Voltage Range 1
-
58.5
Voltage Range 2 15 19
t
hr(OUT)
Data output hold time
on rising edge
Voltage Range 1 3.5 -
-
Voltage Range 2 8 -
t
hf(OUT)
Data output hold time
on falling edge
Voltage Range 1 3.5 -
-
Voltage Range 2 13 -
1. Guaranteed by characterization results.
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