Datasheet

Electrical characteristics STM32L431xx
158/200 DocID028800 Rev 1
SPI characteristics
Unless otherwise specified, the parameters given in Table 82 for SPI are derived from tests
performed under the ambient temperature, f
PCLKx
frequency and supply voltage conditions
summarized in
Table 21: General operating conditions.
• Output speed is set to OSPEEDRy[1:0] = 11
• Capacitive load C = 30 pF
• Measurement points are done at CMOS levels: 0.5  V
DD
Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO for SPI).
Table 82. SPI characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
f
SCK
1/t
c(SCK)
SPI clock frequency
Master mode receiver/full duplex
2.7 < V
DD
< 3.6 V
Voltage Range 1
--
40
MHz
Master mode receiver/full duplex
1.71 < V
DD
< 3.6 V
Voltage Range 1
16
Master mode transmitter
1.71 < V
DD
< 3.6 V
Voltage Range 1
40
Slave mode receiver
1.71 < V
DD
< 3.6 V
Voltage Range 1
40
Slave mode transmitter/full duplex
2.7 < V
DD
< 3.6 V
Voltage Range 1
37
(2)
Slave mode transmitter/full duplex
1.71 < V
DD
< 3.6 V
Voltage Range 1
20
(2)
Voltage Range 2 13
t
su(NSS)
NSS setup time Slave mode, SPI prescaler = 2 4T
PCLK
--ns
t
h(NSS)
NSS hold time Slave mode, SPI prescaler = 2 2T
PCLK
--ns
t
w(SCKH)
t
w(SCKL)
SCK high and low time Master mode T
PCLK
-2 T
PCLK
T
PCLK
+2 ns
t
su(MI)
Data input setup time
Master mode 4 - -
ns
t
su(SI)
Slave mode 1.5 - -
t
h(MI)
Data input hold time
Master mode 6.5 - -
ns
t
h(SI)
Slave mode 1.5 - -
t
a(SO)
Data output access time Slave mode 9 - 36 ns
t
dis(SO)
Data output disable time Slave mode 9 - 16 ns
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