Datasheet

DS10690 Rev 6 143/144
STM32L071xx Revision history
143
07-May-2018 5
Updated Arm logo and added Arm word mark notice in Section 1:
Introduction.
Removed Cortex logo.
Updated Table 5: Functionalities depending on the working mode
(from Run/active down to standby) to change I2C functionality to
disabled in Low-power Run and Low-power Sleep modes.
Section 4: Pin descriptions:
– Changed PC14-OSC_IN into PC14-OSC32_IN in Figure 10:
STM32L071xx UFQFPN32 pinout.
– Extended Figure 6 to UFBGA64.
– Added UFBGA64 in Table 15: STM32L071xxx pin definition (same
pinout as TFBGA64
– Swapped E5 and E6 signals for UFBGA64/TFBGA64.
– Changed USARTx_RTS, USARTx_RTS_DE into
USARTx_RTS/USARTx_DE, and LPUART1_RTS,
LPUART1_RTS_DE into LPUART1_RTS/LPUART1_DE in
Table 15: STM32L071xxx pin definition and in all alternate function
tables.
Updated power dissipation (P
D
) in Table 25: General operating
conditions to add UFBGA64 package.
Updated t
AF
maximum value for range 1 in Table 70: I2C analog filter
characteristics.
Added Section 7.4: UFBGA64 package information. Added
UFBGA64 in Table 88: Thermal characteristics and Figure 63:
Thermal resistance
Updated Figure 60: UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra
thin fine pitch quad flat package outline and added note related to
exposed pad; updated Table 87: UFQFPN32 - 32-pin, 5x5 mm,
0.5 mm pitch ultra thin fine pitch quad flat package mechanical data.
Updated Figure 48: TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin
profile fine pitch ball grid array package outline, Figure 49: TFBGA64
– 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball ,grid
array recommended footprint and Figure 82: TFBGA64
recommended PCB design rules (0.5 mm pitch BGA).
31-Aug-2018 6 Updated Table 15: STM32L071xxx pin definition.
Table 90. Document revision history
Date Revision Changes
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