Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 128KB UFQFPN
101
102
103
104
105
106
107
108
109
110
Electrical characteristics STM32L071xx
108/144 DS10690 Rev 6
Figure 33. SPI timing diagram - slave mode and CPHA = 0
Figure 34. SPI timing diagram - slave mode and CPHA = 1
(1)
1. Measurement points are done at CMOS levels: 0.3V
DD
 and 0.7V
DD.
MSv41658V1
NSS input
CPHA=0
CPOL=0
SCK input
CPHA=0
CPOL=1
MISO output
MOSI input
t
su(SI)
t
h(SI)
t
w(SCKL)
t
w(SCKH)
t
c(SCK)
t
r(SCK)
t
h(NSS)
t
dis(SO)
t
su(NSS)
t
a(SO)
t
v(SO)
Next bits IN
Last bit OUT
First bit IN
First bit OUT Next bits OUT
t
h(SO)
t
f(SCK)
Last bit IN
MSv41659V1
NSS input
CPHA=1
CPOL=0
SCK input
CPHA=1
CPOL=1
MISO output
MOSI input
t
su(SI)
t
h(SI)
t
w(SCKL)
t
w(SCKH)
t
su(NSS)
t
c(SCK)
t
a(SO)
t
v(SO)
First bit OUT Next bits OUT
Next bits IN
Last bit OUT
t
h(SO)
t
r(SCK)
t
f(SCK)
t
h(NSS)
t
dis(SO)
First bit IN Last bit IN
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