Datasheet

Electrical characteristics STM32L052x6 STM32L052x8
102/143 DocID025936 Rev 8
6.3.19 Timer characteristics
TIM timer characteristics
The parameters given in the Table 71 are guaranteed by design.
Refer to Section 6.3.13: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
6.3.20 Communications interfaces
I
2
C interface characteristics
The
I
2
C interface meets the timings requirements of the
I
2
C-bus specification and user
manual rev. 03 for:
• Standard-mode (Sm) : with a bit rate up to 100 kbit/s
• Fast-mode (Fm) : with a bit rate up to 400 kbit/s
• Fast-mode Plus (Fm+) : with a bit rate up to 1 Mbit/s.
The
I
2
C timing requirements are guaranteed by design when the
I
2
C peripheral is properly
configured (refer to the reference manual for details). The SDA and SCL I/O requirements
are met with the following restrictions: the SDA and SCL I/O pins are not "true" open-drain.
When configured as open-drain, the PMOS connected between the I/O pin and VDDIOx is
disabled, but is still present. Only FTf I/O pins support Fm+ low level output current
maximum requirement (refer to Section 6.3.13: I/O port characteristics for the I2C I/Os
characteristics).
All
I
2
C SDA and SCL I/Os embed an analog filter (see Table 72 for the analog filter
characteristics).
Table 71. TIMx characteristics
(1)
Symbol Parameter Conditions Min Max Unit
t
res(TIM)
Timer resolution time
1-t
TIMxCLK
f
TIMxCLK
= 32 MHz 31.25 - ns
f
EXT
Timer external clock frequency on CH1
to CH4
0f
TIMxCLK
/2 MHz
f
TIMxCLK
= 32 MHz 0 16 MHz
Res
TIM
Timer resolution - 16 bit
t
COUNTER
16-bit counter clock period when
internal clock is selected (timer’s
prescaler disabled)
- 1 65536 t
TIMxCLK
f
TIMxCLK
= 32 MHz 0.0312 2048 µs
t
MAX_COUNT
Maximum possible count
- - 65536 × 65536 t
TIMxCLK
f
TIMxCLK
= 32 MHz - 134.2 s
1. TIMx is used as a general term to refer to the TIM2, TIM6, TIM21, and TIM22 timers.
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