Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 64KB LQFP

This is information on a product in full production.

September 2017 DocID025936 Rev 8 1/143

STM32L052x6 STM32L052x8

Ultra-low-power 32-bit MCU Arm

-based Cortex

-M0+, up to 64 KB

Flash memory, 8 KB SRAM, 2 KB EEPROM, USB, ADC, DAC

Datasheet - production data

Features

•

Ultra-low-power platform

– 1.65 V to 3.6 V power supply

–

40 to 125 °C temperature range

– 0.27 µA Standby mode (2 wakeup pins)

– 0.4 µA Stop mode (16 wakeup lines)

– 0.8 µA Stop mode + RTC + 8 KB RAM retention

– 88 µA/MHz in Run mode

– 3.5 µs wakeup time (from RAM)

– 5 µs wakeup time (from Flash memory)

•

Core: Arm

32-bit Cortex

-M0+ with MPU

– From 32 kHz up to 32 MHz max.

– 0.95 DMIPS/MHz

•

Memories

–

Up to

64 KB Flash memory with ECC

–8KB RAM

– 2 KB of data EEPROM with ECC

– 20-byte backup register

– Sector protection against R/W operation

•

Up to 51 fast I/Os (45 I/Os 5V tolerant)

•

Reset and supply management

– Ultra-safe, low-power BOR (brownout reset)

with 5 selectable thresholds

– Ultra-low-power POR/PDR

– Programmable voltage detector (PVD)

•

Clock sources

– 1 to 25 MHz crystal oscillator

– 32 kHz oscillator for RTC with calibration

– High speed internal 16 MHz factory-trimmed RC

(+/- 1%)

– Internal low-power 37 kHz RC

– Internal multispeed low-power 65 kHz to

4.2 MHz RC

– Internal self calibration of 48 MHz RC for USB

– PLL for CPU clock

•

Pre-programmed bootloader

– USART, SPI supported

•

Development support

– Serial wire debug supported

•

Rich Analog peripherals

– 12-bit ADC 1.14 Msps up to 16 channels (down

to 1.65 V)

– 12-bit 1 channel DAC with output buffers (down

to 1.8 V)

– 2x ultra-low-power comparators (window mode

and wake up capability, down to 1.65 V)

•

Up to 24 capacitive sensing channels supporting

touchkey, linear and rotary touch sensors

•

7-channel DMA controller, supporting ADC, SPI,

I2C, USART, DAC, Timers

•

8x peripheral communication interfaces

– 1x USB 2.0 crystal-less, battery charging

detection and LPM

– 2x USART (ISO 7816, IrDA), 1x UART (low

power)

– Up to 4x SPI 16 Mbits/s

– 2x I2C (SMBus/PMBus)

•

9x timers: 1x 16-bit with up to 4 channels, 2x 16-bit

with up to 2 channels, 1x 16-bit ultra-low-power

timer, 1x SysTick, 1x RTC, 1x 16-bit basic for DAC,

and 2x watchdogs (independent/window)

•

CRC calculation unit, 96-bit unique ID

•

True RNG and firewall protection

•

All packages are ECOPACK

Table 1. Device summary

Reference Part number

STM32L052x6

STM32L052C6,

STM32L052K6,

STM32L052R6,

STM32L052T6

STM32L052x8

STM32L052C8,

STM32L052K8,

STM32L052R8,

STM32L052T8

UFQFPN32

5x5 mm

LQFP32 7x7 mm

LQFP48 7x7 mm

LQFP64 10x10 mm

Standard and thin

WLCSP36

2.61x2.88 mm

TFBGA64

5x5 mm

)%*$

www.st.com

Downloaded from Arrow.com.

Summary of content (143 pages)

PAGE 1
STM32L052x6 STM32L052x8 Ultra-low-power 32-bit MCU Arm®-based Cortex®-M0+, up to 64 KB Flash memory, 8 KB SRAM, 2 KB EEPROM, USB, ADC, DAC Datasheet - production data Features • • • • • • • • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.27 µA Standby mode (2 wakeup pins) – 0.4 µA Stop mode (16 wakeup lines) – 0.8 µA Stop mode + RTC + 8 KB RAM retention – 88 µA/MHz in Run mode – 3.
PAGE 2
Contents STM32L052x6 STM32L052x8 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.2 Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
STM32L052x6 STM32L052x8 3.18 Contents 3.17.5 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.17.6 Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.18.1 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.18.
PAGE 4
Contents 7 STM32L052x6 STM32L052x8 6.3.11 Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.3.12 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.3.13 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.3.14 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 6.3.15 12-bit ADC characteristics . . .
PAGE 5
STM32L052x6 STM32L052x8 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45.
PAGE 6
List of tables Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92.
PAGE 7
STM32L052x6 STM32L052x8 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42.
PAGE 8
List of figures Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. Figure 55. Figure 56. Figure 57. Figure 58. 8/143 Downloaded from Arrow.com. STM32L052x6 STM32L052x8 ,grid array recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 TFBGA64 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 9
STM32L052x6 STM32L052x8 1 Introduction Introduction The ultra-low-power STM32L052x6/8 are offered in 7 different package types: from 32 pins to 64 pins. Depending on the device chosen, different sets of peripherals are included, the description below gives an overview of the complete range of peripherals proposed in this family.
PAGE 10
Description 2 STM32L052x6 STM32L052x8 Description The ultra-low-power STM32L052x6/8 microcontrollers incorporate the connectivity power of the universal serial bus (USB 2.0 crystal-less) with the high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at a 32 MHz frequency, a memory protection unit (MPU), highspeed embedded memories (64 Kbytes of Flash program memory, 2 Kbytes of data EEPROM and 8 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals.
PAGE 11
STM32L052x6 STM32L052x8 2.1 Description Device overview Table 2.
PAGE 12
Description STM32L052x6 STM32L052x8 Table 2. Ultra-low-power STM32L052x6/x8 device features and peripheral counts (continued) Peripheral STM32L0 52T6 STM32 L052K6 STM32 L052R6 STM32L 052T8 STM32 L052K8 STM32 L052C8 STM32 L052R8 LQFP32, UFQFPN LQFP48 32 LQFP64 TFBGA 64 Ambient temperature: –40 to +125 °C Junction temperature: –40 to +130 °C Operating temperatures Packages STM32 L052C6 WLCSP 36 LQFP32, UFQFPN 32 LQFP48 LQFP64 TFBGA 64 WLCSP 36 1.
PAGE 13
STM32L052x6 STM32L052x8 Description Figure 1. STM32L052x6/8 block diagram 7HPS VHQVRU 6:' 6:' )/$6+ ((3520 %227 ),5(:$// &257(; 0 &38 )PD[ 0+] 5$0 038 '%* '0$ 19,& (;7, $ 3 % $'& $,1[ 63, 0,62 026, 6&. 166 86$57 5; 7; 576 &76 &. 7,0 FK 7,0 FK %5,'*( &203 ,13 ,10 287 &203 ,13 ,10 287 %5,'*( /37,0 ,1 ,1 (75 287 5$0 .
PAGE 14
Description 2.2 STM32L052x6 STM32L052x8 Ultra-low-power device continuum The ultra-low-power family offers a large choice of core and features, from 8-bit proprietary core up to Arm® Cortex®-M4, including Arm® Cortex®-M3 and Arm® Cortex®-M0+. The STM32Lx series are the best choice to answer your needs in terms of ultra-low-power features. The STM32 ultra-low-power series are the best solution for applications such as gaz/water meter, keyboard/mouse or fitness and healthcare application.
PAGE 15
STM32L052x6 STM32L052x8 Functional overview 3 Functional overview 3.1 Low-power modes The ultra-low-power STM32L052x6/8 support dynamic voltage scaling to optimize its power consumption in Run mode. The voltage from the internal low-drop regulator that supplies the logic can be adjusted according to the system’s maximum operating frequency and the external voltage supply. There are three power consumption ranges: • Range 1 (VDD range limited to 1.71-3.
PAGE 16
Functional overview • STM32L052x6 STM32L052x8 Stop mode without RTC The Stop mode achieves the lowest power consumption while retaining the RAM and register contents. All clocks are stopped, the PLL, MSI RC, HSI and LSI RC, HSE and LSE crystal oscillators are disabled. Some peripherals featuring wakeup capability can enable the HSI RC during Stop mode to detect their wakeup condition. The voltage regulator is in the low-power mode. The device can be woken up from Stop mode by any of the EXTI line, in 3.
PAGE 17
STM32L052x6 STM32L052x8 Functional overview Table 3. Functionalities depending on the operating power supply range Functionalities depending on the operating power supply range Operating power supply range(1) DAC and ADC operation Dynamic voltage scaling range USB VDD = 1.65 to 1.71 V ADC only, conversion time up to 570 ksps Range 2 or range 3 Not functional VDD = 1.71 to 1.8 V(2) ADC only, conversion time up to 1.14 Msps Range 1, range 2 or range 3 Functional(3) VDD = 1.8 to 2.
PAGE 18
Functional overview STM32L052x6 STM32L052x8 Table 5.
PAGE 19
STM32L052x6 STM32L052x8 Functional overview Table 5. Functionalities depending on the working mode (from Run/active down to standby) (continued)(1) Standby Run/Active Sleep Temperature sensor O O O O O Comparators O O O O O 16-bit timers O O O O -- LPTIMER O O O O O O IWDG O O O O O O WWDG O O O O -- -- Touch sensing controller (TSC) O O -- -- -- -- SysTick Timer O O O O GPIOs O O O O 0 µs 0.
PAGE 20
Functional overview 3.2 STM32L052x6 STM32L052x8 Interconnect matrix Several peripherals are directly interconnected. This allows autonomous communication between peripherals, thus saving CPU resources and power consumption. In addition, these hardware connections allow fast and predictable latency. Depending on peripherals, these interconnections can operate in Run, Sleep, Low-power run, Low-power sleep and Stop modes. Table 6.
PAGE 21
STM32L052x6 STM32L052x8 3.3 Functional overview Arm® Cortex®-M0+ core with MPU The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications.
PAGE 22
Functional overview STM32L052x6 STM32L052x8 3.4 Reset and supply management 3.4.1 Power supply schemes 3.4.2 • VDD = 1.65 to 3.6 V: external power supply for I/Os and the internal regulator. Provided externally through VDD pins. • VSSA, VDDA = 1.65 to 3.6 V: external analog power supplies for ADC, DAC, reset blocks, RCs and PLL (minimum voltage to be applied to VDDA is 1.8 V when the DAC is used). VDDA and VSSA must be connected to VDD and VSS, respectively. • VDD_USB = 1.65 to 3.
PAGE 23
STM32L052x6 STM32L052x8 3.4.3 Functional overview Voltage regulator The regulator has three operation modes: main (MR), low power (LPR) and power down. 3.5 • MR is used in Run mode (nominal regulation) • LPR is used in the Low-power run, Low-power sleep and Stop modes • Power down is used in Standby mode.
PAGE 24
Functional overview • STM32L052x6 STM32L052x8 Startup clock After reset, the microcontroller restarts by default with an internal 2 MHz clock (MSI). The prescaler ratio and clock source can be changed by the application program as soon as the code execution starts. • Clock security system (CSS) This feature can be enabled by software. If an HSE clock failure occurs, the master clock is automatically switched to HSI and a software interrupt is generated if enabled.
PAGE 25
STM32L052x6 STM32L052x8 Functional overview Figure 2. Clock tree #9 (QDEOH :DWFKGRJ /6, 5& :DWFKGRJ /6 /6, WHPSR /HJHQG +6( +LJK VSHHG H[WHUQDO FORFN VLJQDO +6, +LJK VSHHG LQWHUQDO FORFN VLJQDO /6, /RZ VSHHG LQWHUQDO FORFN VLJQDO /6( /RZ VSHHG H[WHUQDO FORFN VLJQDO 06, 0XOWLVSHHG LQWHUQDO FORFN VLJQDO 57&6(/ 57& HQDEOH /6( 26& 57& /6( WHPSR /68 /6' /6' 0+] #9 #9 06, 5& /6, /6( 06, /HYHO VKLIWHUV #9 0&26(/ $'& HQDEOH $'&&/.
PAGE 26
Functional overview 3.6 STM32L052x6 STM32L052x8 Low-power real-time clock and backup registers The real time clock (RTC) and the 5 backup registers are supplied in all modes including standby mode. The backup registers are five 32-bit registers used to store 20 bytes of user application data. They are not reset by a system reset, or when the device wakes up from Standby mode. The RTC is an independent BCD timer/counter.
PAGE 27
STM32L052x6 STM32L052x8 3.8 Functional overview Memories The STM32L052x6/8 devices have the following features: • 8 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait states. With the enhanced bus matrix, operating the RAM does not lead to any performance penalty during accesses to the system bus (AHB and APB buses).
PAGE 28
Functional overview 3.10 STM32L052x6 STM32L052x8 Direct memory access (DMA) The flexible 7-channel, general-purpose DMA is able to manage memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports circular buffer management, avoiding the generation of interrupts when the controller reaches the end of the buffer. Each channel is connected to dedicated hardware DMA requests, with software trigger support for each channel.
PAGE 29
STM32L052x6 STM32L052x8 Functional overview To improve the accuracy of the temperature sensor measurement, each device is individually factory-calibrated by ST. The temperature sensor factory calibration data are stored by ST in the system memory area, accessible in read-only mode. Table 7. Temperature sensor calibration values Calibration value name 3.12.
PAGE 30
Functional overview 3.14 STM32L052x6 STM32L052x8 Ultra-low-power comparators and reference voltage The STM32L052x6/8 embed two comparators sharing the same current bias and reference voltage. The reference voltage can be internal or external (coming from an I/O). • One comparator with ultra low consumption • One comparator with rail-to-rail inputs, fast or slow mode.
PAGE 31
STM32L052x6 STM32L052x8 Functional overview Table 9.
PAGE 32
Functional overview 3.17.1 STM32L052x6 STM32L052x8 General-purpose timers (TIM2, TIM21 and TIM22) There are three synchronizable general-purpose timers embedded in the STM32L052x6/8 devices (see Table 10 for differences). TIM2 TIM2 is based on 16-bit auto-reload up/down counter. It includes a 16-bit prescaler. It features four independent channels each for input capture/output compare, PWM or onepulse mode output.
PAGE 33
STM32L052x6 STM32L052x8 3.17.4 Functional overview SysTick timer This timer is dedicated to the OS, but could also be used as a standard downcounter. It is based on a 24-bit downcounter with autoreload capability and a programmable clock source. It features a maskable system interrupt generation when the counter reaches ‘0’. 3.17.5 Independent watchdog (IWDG) The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler.
PAGE 34
Functional overview STM32L052x6 STM32L052x8 Each I2C interface can be served by the DMA controller. Refer to Table 12 for an overview of I2C interface features. Table 12. STM32L052x6/8 I2C implementation I2C features(1) I2C1 I2C2 7-bit addressing mode X X 10-bit addressing mode X X Standard mode (up to 100 kbit/s) X X Fast mode (up to 400 kbit/s) X X Fast Mode Plus with 20 mA output drive I/Os (up to 1 Mbit/s) X X(2) Independent clock X - SMBus X - Wakeup from STOP X - 1.
PAGE 35
STM32L052x6 STM32L052x8 Functional overview Table 13. USART implementation (continued) USART modes/features(1) USART1 and USART2 Modbus communication X Auto baud rate detection (4 modes) X Driver Enable X 1. X = supported. 2. This mode allows using the USART as an SPI master. 3.18.3 Low-power universal asynchronous receiver transmitter (LPUART) The devices embed one Low-power UART. The LPUART supports asynchronous serial communication with minimum power consumption.
PAGE 36
Functional overview STM32L052x6 STM32L052x8 Table 14. SPI/I2S implementation SPI features(1) SPI1 SPI2 Hardware CRC calculation X X I2S mode - X TI mode X X 1. X = supported. 3.18.5 Universal serial bus (USB) The STM32L052x6/8 embed a full-speed USB device peripheral compliant with the USB specification version 2.0. The internal USB PHY supports USB FS signaling, embedded DP pull-up and also battery charging detection according to Battery Charging Specification Revision 1.2.
PAGE 37
STM32L052x6 STM32L052x8 4 Pin descriptions Pin descriptions 9'' 966 3% 3% %227 3% 3% 3% 3% 3% 3' 3& 3& 3& 3$ 3$ Figure 3.
PAGE 38
Pin descriptions STM32L052x6 STM32L052x8 Figure 4.
PAGE 39
STM32L052x6 STM32L052x8 Pin descriptions 9'' 966 3% 3% %227 3% 3% 3% 3% 3% 3$ 3$ Figure 5.
PAGE 40
Pin descriptions STM32L052x6 STM32L052x8 9'' 3& 26& B,1 3& 26& B287 /4)3 3$ 3$ 3$ 3$ 3$ 3$ 3$ 9'' 3$ 3$ 3$ 3$ 3$ 3% 3% 966 1567 9''$ 3$ 3$ 3$ 3% 3% 3% 3% 3% 3$ 966 %227 Figure 7. STM32L052x6/8 LQFP32 pinout 06Y 9 1. The above figure shows the package top view.
PAGE 41
STM32L052x6 STM32L052x8 Pin descriptions Table 15. Legend/abbreviations used in the pinout table Name Abbreviation Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name Pin name Pin type I/O structure S Supply pin I Input only pin I/O Input / output pin FT 5 V tolerant I/O FTf 5 V tolerant I/O, FM+ capable TC Standard 3.
PAGE 42
Pin descriptions STM32L052x6 STM32L052x8 Table 16.
PAGE 43
STM32L052x6 STM32L052x8 Pin descriptions Table 16.
PAGE 44
Pin descriptions STM32L052x6 STM32L052x8 Table 16.
PAGE 45
STM32L052x6 STM32L052x8 Pin descriptions Table 16.
PAGE 46
Pin descriptions STM32L052x6 STM32L052x8 Table 16.
PAGE 47
Downloaded from Arrow.com.
PAGE 48
/143 Downloaded from Arrow.com.
PAGE 49
Port C Port Downloaded from Arrow.com.
PAGE 50
Port H Port D Port 50/143 Downloaded from Arrow.com. - PH1 USB AF0 LPUART1_RTS_DE USB_CRS_SYNC Table 21. Alternate function port H PD2 AF0 LPUART1 PH0 Port Table 20.
PAGE 51
STM32L052x6 STM32L052x8 5 Memory mapping Memory mapping Refer to the product line reference manual for details on the memory mapping as well as the boundary addresses for all peripherals. DocID025936 Rev 8 51/143 51 Downloaded from Arrow.com.
PAGE 52
Electrical characteristics STM32L052x6 STM32L052x8 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 6.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
PAGE 53
STM32L052x6 STM32L052x8 6.1.6 Electrical characteristics Power supply scheme Figure 11. Power supply scheme 287 *3 , 2V ,1 9'' 9'' /HYHO VKLIWHU 6WDQGE\ SRZHU FLUFXLWU\ 26& 57& :DNH XS ORJLF 57& EDFNXS UHJLVWHUV ,2 /RJLF .HUQHO ORJLF &38 'LJLWDO 0HPRULHV 5HJXODWRU 1 î Q) î ) 966 9''$ 9''$ 95() Q) ) Q) ) 95() 95() $'& '$& $QDORJ 5& 3// &203 « 966$ 966 9''B86% 86% WUDQVFHLYHU 06Y 9 6.1.
PAGE 54
Electrical characteristics 6.2 STM32L052x6 STM32L052x8 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 22: Voltage characteristics, Table 23: Current characteristics, and Table 24: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
PAGE 55
STM32L052x6 STM32L052x8 Electrical characteristics Table 23. Current characteristics Symbol Ratings Max.
PAGE 56
Electrical characteristics STM32L052x6 STM32L052x8 6.3 Operating conditions 6.3.1 General operating conditions Table 25. General operating conditions Symbol Parameter Conditions Min Max fHCLK Internal AHB clock frequency - 0 32 fPCLK1 Internal APB1 clock frequency - 0 32 fPCLK2 Internal APB2 clock frequency - 0 32 BOR detector disabled 1.65 3.6 BOR detector enabled, at power-on 1.8 3.6 BOR detector disabled, after power-on 1.65 3.
PAGE 57
STM32L052x6 STM32L052x8 Electrical characteristics Table 25.
PAGE 58
Electrical characteristics 6.3.2 STM32L052x6 STM32L052x8 Embedded reset and power control block characteristics The parameters given in the following table are derived from the tests performed under the ambient temperature condition summarized in Table 25. Table 26.
PAGE 59
STM32L052x6 STM32L052x8 Electrical characteristics Table 26. Embedded reset and power control block characteristics (continued) Symbol Parameter VPVD6 Conditions PVD threshold 6 Hysteresis voltage Vhyst Min Typ Max Falling edge 2.97 3.05 3.09 Rising edge 3.08 3.15 3.20 BOR0 threshold - 40 - All BOR and PVD thresholds excepting BOR0 - 100 - Unit V mV 1. Guaranteed by characterization results. 2. Valid for device version without BOR at power up.
PAGE 60
Electrical characteristics STM32L052x6 STM32L052x8 Table 28. Embedded internal reference voltage(1) (continued) Symbol Parameter Conditions Min Typ Max Unit Consumption of reference voltage buffer for VREF_OUT and COMP - - 730 1200 nA VREFINT_DIV1(4) 1/4 reference voltage - 24 25 26 VREFINT_DIV2(4) 1/2 reference voltage - 49 50 51 VREFINT_DIV3(4) 3/4 reference voltage - 74 75 76 ILPBUF(4) % VREFINT 1.
PAGE 61
STM32L052x6 STM32L052x8 Electrical characteristics Table 29. Current consumption in Run mode, code with data processing running from Flash Symbol Parameter fHCLK Typ Max(1) 1 MHz 165 230 2 MHz 290 360 4 MHz 555 630 4 MHz 0.665 0.74 8 MHz 1.3 1.4 16 MHz 2.6 2.8 8 MHz 1.55 1.7 16 MHz 3.1 3.4 32 MHz 6.3 6.8 65 kHz 36.5 110 524 kHz 99.5 190 4.2 MHz 620 700 Range 2, VCORE=1.5 V, VOS[1:0]=10, 16 MHz 2.6 2.9 Range 1, VCORE=1.8 V, VOS[1:0]=01 32 MHz 6.
PAGE 62
Electrical characteristics STM32L052x6 STM32L052x8 Figure 13. IDD vs VDD, at TA= 25/55/85/105 °C, Run mode, code running from Flash memory, Range 2, HSE, 1WS / ;ŵ Ϳ ϯ͘ϬϬ Ϯ͘ϱϬ Ϯ͘ϬϬ ϭ͘ϱϬ ϭ͘ϬϬ Ϭ͘ϱϬ Ϭ s ;sͿ ϭ͘ϴϬ нϬϬ Ϯ͘ϬϬ нϬϬ Ϯ͘ϮϬ нϬϬ Ϯ͘ϰϬ нϬϬ Ϯ͘ϲϬ нϬϬ Ϯ͘ϴϬ нϬϬ ϯ͘ϬϬ нϬϬ ϯ͘ϮϬ нϬϬ ϯ͘ϰϬ нϬϬ ϯ͘ϲϬ нϬϬ ŚƌǇƐƚŽŶĞ Ϯ͘ϭ Ͳ ϭ t^ Ͳ ϱϱΣ ŚƌǇƐƚŽŶĞ Ϯ͘ϭͲ ϭ t^ Ͳ ϴϱΣ ŚƌǇƐƚŽŶĞ Ϯ͘ϭͲ ϭ t^ ʹ ϮϱΣ ŚƌǇƐƚŽŶĞ Ϯ͘ϭͲ ϭ t^ Ͳ ϭϬϱΣ 06Y 9 Figure 14.
PAGE 63
STM32L052x6 STM32L052x8 Electrical characteristics Table 31. Current consumption in Run mode, code with data processing running from RAM Symbol Parameter fHCLK Typ Max(1) 1 MHz 135 170 2 MHz 240 270 4 MHz 450 480 4 MHz 0.52 0.6 8 MHz 1 1.2 16 MHz 2 2.3 8 MHz 1.25 1.4 16 MHz 2.45 2.8 32 MHz 5.1 5.4 65 kHz 34.5 75 524 kHz 83 120 4.2 MHz 485 540 Range 2, VCORE=1.5 V, VOS[1:0]=10 16 MHz 2.1 2.3 Range 1, VCORE=1.8 V, VOS[1:0]=01 32 MHz Conditions Range 3, VCORE=1.
PAGE 64
Electrical characteristics STM32L052x6 STM32L052x8 Table 33. Current consumption in Sleep mode Symbol Parameter fHCLK Typ Max(1) 1 MHz 43.5 90 2 MHz 72 120 4 MHz 130 180 4 MHz 160 210 8 MHz 305 370 16 MHz 590 710 8 MHz 370 430 16 MHz 715 860 32 MHz 1650 1900 65 kHz 18 65 524 kHz 31.5 75 4.2 MHz 140 210 Range 2, VCORE=1.5 V, VOS[1:0]=10 16 MHz 665 830 Range 1, VCORE=1.8 V, VOS[1:0]=01 32 MHz 1750 2100 1 MHz 57.
PAGE 65
STM32L052x6 STM32L052x8 Electrical characteristics 2. Oscillator bypassed (HSEBYP = 1 in RCC_CR register). Table 34. Current consumption in Low-power run mode Symbol Parameter Typ Max(1) TA = − 40 to 25°C 8.5 10 TA = 85 °C 11.5 48 TA = 105 °C 15.5 53 TA = 125 °C 27.5 130 TA =-40 °C to 25 °C 10 15 TA = 85 °C 15.5 50 TA = 105 °C 19.5 54 TA = 125 °C 31.5 130 TA = − 40 to 25°C 20 25 TA = 55 °C 23 50 TA = 85 °C 25.5 55 TA = 105 °C 29.
PAGE 66
Electrical characteristics STM32L052x6 STM32L052x8 Figure 15. IDD vs VDD, at TA= 25/55/ 85/105/125 °C, Low-power run mode, code running from RAM, Range 3, MSI (Range 0) at 64 KHz, 0 WS ,'' P$ ( ( ( ( ( ( ( 9'' 9 :6 & :6 & :6 ± & :6 & :6 & 06Y 9 Table 35.
PAGE 67
STM32L052x6 STM32L052x8 Electrical characteristics Table 36. Typical and maximum current consumptions in Stop mode Symbol Parameter Max(1) Unit Conditions Typ TA = − 40 to 25°C 0.41 1 TA = 55°C 0.63 2.1 TA= 85°C 1.7 4.5 TA = 105°C 4 9.6 TA = 125°C 11 24(2) IDD (Stop) Supply current in Stop mode µA 1. Guaranteed by characterization results at 125 °C, unless otherwise specified. 2. Guaranteed by test in production. Figure 16.
PAGE 68
Electrical characteristics STM32L052x6 STM32L052x8 Table 37. Typical and maximum current consumptions in Standby mode Symbol Parameter Typ Max(1) TA = − 40 to 25°C 1.3 1.7 TA = 55 °C - 2.9 TA= 85 °C - 3.3 TA = 105 °C - 4.1 TA = 125 °C - 8.5 TA = − 40 to 25°C 0.29 0.6 TA = 55 °C 0.32 0.9 TA = 85 °C 0.5 2.3 TA = 105 °C 0.94 3 TA = 125 °C 2.
PAGE 69
STM32L052x6 STM32L052x8 Electrical characteristics On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in the following tables.
PAGE 70
Electrical characteristics STM32L052x6 STM32L052x8 Table 39. Peripheral current consumption in Run or Sleep mode(1) (continued) Typical consumption, VDD = 3.0 V, TA = 25 °C Peripheral Range 2, Range 3, Range 1, VCORE=1.8 V VCORE=1.5 V VCORE=1.2 V VOS[1:0] = 01 VOS[1:0] = 10 VOS[1:0] = 11 Low-power sleep and run Unit GPIOA 3.5 3 2.5 2.5 GPIOB CortexM0+ core GPIOC I/O port GPIOD 3.5 2.5 2 2.5 8.5 6.5 5.5 7 1 0.5 0.5 0.5 GPIOH 1.5 1 1 0.5 CRC 1.
PAGE 71
STM32L052x6 STM32L052x8 Electrical characteristics Table 40. Peripheral current consumption in Stop and Standby mode(1) Symbol IDD(PVD / BOR) - IREFINT - - LSE Low - Typical consumption, TA = 25 °C Peripheral drive(2) LPTIM1, Input 100 Hz VDD=1.8 V VDD=3.0 V 0.7 1.2 - 1.4 0,1 0,1 0,01 0,01 Unit µA - LPTIM1, Input 1 MHz 6 6 - LPUART1 0,2 0,2 - RTC 0,3 0,48 1. LPTIM peripheral cannot operate in Standby mode. 2.
PAGE 72
Electrical characteristics STM32L052x6 STM32L052x8 Table 41. Low-power mode wakeup timings (continued) Symbol tWUSTOP tWUSTDBY 72/143 Downloaded from Arrow.com. Parameter Conditions Typ Max Unit fHCLK = fMSI = 4.2 MHz Wakeup from Stop mode, regulator in Run fHCLK = fHSI = 16 MHz mode fHCLK = fHSI/4 = 4 MHz 5.0 8 4.9 7 8.0 11 fHCLK = fMSI = 4.2 MHz Voltage range 1 5.0 8 fHCLK = fMSI = 4.2 MHz Voltage range 2 5.0 8 fHCLK = fMSI = 4.2 MHz Voltage range 3 5.0 8 7.
PAGE 73
STM32L052x6 STM32L052x8 6.3.6 Electrical characteristics External clock source characteristics High-speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a standard GPIO.The external clock signal has to respect the I/O characteristics in Section 6.3.12. However, the recommended clock input waveform is shown in Figure 18. Table 42.
PAGE 74
Electrical characteristics STM32L052x6 STM32L052x8 Low-speed external user clock generated from an external source The characteristics given in the following table result from tests performed using a lowspeed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 25. Table 43.
PAGE 75
STM32L052x6 STM32L052x8 Electrical characteristics High-speed external clock generated from a crystal/ceramic resonator The high-speed external (HSE) clock can be supplied with a 1 to 25 MHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 44.
PAGE 76
Electrical characteristics STM32L052x6 STM32L052x8 Low-speed external clock generated from a crystal/ceramic resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 45.
PAGE 77
STM32L052x6 STM32L052x8 6.3.7 Electrical characteristics Internal clock source characteristics The parameters given in Table 46 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 25. High-speed internal 16 MHz (HSI16) RC oscillator Table 46. 16 MHz HSI16 oscillator characteristics Symbol fHSI16 TRIM (1)(2) ACCHSI16 (2) Parameter Conditions Min Typ Max Unit Frequency VDD = 3.
PAGE 78
Electrical characteristics STM32L052x6 STM32L052x8 High-speed internal 48 MHz (HSI48) RC oscillator Table 47. HSI48 oscillator characteristics(1) Symbol fHSI48 TRIM Parameter Conditions Frequency Min Typ Max Unit - 48 - MHz (2) HSI48 user-trimming step 0.09 DuCy(HSI48) Duty cycle 0.14 (2) % (2) % 0.
PAGE 79
STM32L052x6 STM32L052x8 Electrical characteristics Table 49. MSI oscillator characteristics (continued) Symbol ACCMSI DTEMP(MSI)(1) DVOLT(MSI)(1) IDD(MSI)(2) tSU(MSI) Parameter Condition Typ Frequency error after factory calibration - ±0.5 - MSI oscillator frequency drift 0 °C ≤TA ≤85 °C - ±3 - MSI range 0 − 8.9 +7.0 MSI range 1 − 7.1 +5.0 MSI range 2 − 6.4 +4.0 MSI range 3 − 6.2 +3.0 MSI range 4 − 5.2 +3.0 MSI range 5 − 4.8 +2.0 MSI range 6 − 4.7 +2.0 - - 2.
PAGE 80
Electrical characteristics STM32L052x6 STM32L052x8 Table 49. MSI oscillator characteristics (continued) Symbol tSTAB(MSI)(2) fOVER(MSI) Parameter Condition MSI oscillator stabilization time MSI oscillator frequency overshoot Typ Max Unit MSI range 0 - 40 MSI range 1 - 20 MSI range 2 - 10 MSI range 3 - 4 MSI range 4 - 2.5 MSI range 5 - 2 MSI range 6, Voltage range 1 and 2 - 2 MSI range 3, Voltage range 3 - 3 Any range to range 5 - 4 Any range to range 6 - µs MHz 6 1.
PAGE 81
STM32L052x6 STM32L052x8 6.3.9 Electrical characteristics Memory characteristics RAM memory Table 51. RAM and hardware registers Symbol VRM Parameter Conditions Data retention mode(1) STOP mode (or RESET) Min Typ Max Unit 1.65 - - V 1. Minimum supply voltage without losing data stored in RAM (in Stop mode or under Reset) or in hardware registers (only in Stop mode). Flash memory and data EEPROM Table 52.
PAGE 82
Electrical characteristics STM32L052x6 STM32L052x8 Table 53.
PAGE 83
STM32L052x6 STM32L052x8 Electrical characteristics Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular.
PAGE 84
Electrical characteristics 6.3.11 STM32L052x6 STM32L052x8 Electrical sensitivity characteristics Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination.
PAGE 85
STM32L052x6 STM32L052x8 6.3.12 Electrical characteristics I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard pins) should be avoided during normal product operation. However, in order to give an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens, susceptibility tests are performed on a sample basis during device characterization.
PAGE 86
Electrical characteristics 6.3.13 STM32L052x6 STM32L052x8 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 59 are derived from tests performed under the conditions summarized in Table 25. All I/Os are CMOS and TTL compliant. Table 59.
PAGE 87
STM32L052x6 STM32L052x8 Electrical characteristics Figure 23. VIH/VIL versus VDD (CMOS I/Os) 9,/ 9,+ 9 LQV DOO S 9 '' 3+ 3& 9 ,+PLQ W %227 IRU S H[FH 9 '' + 3 9 ,+PLQ 3& 7 %22 9 ' ' PLQ 9,+PLQ LUH UHTX DUG WDQG 6 V &02 WV 9 ,+ PHQ 9 ,/PD[ ' 9 ' ,QSXW UDQJH QRW JXDUDQWHHG &026 VWDQGDUG UHTXLUHPHQWV 9,/PD[ 9'' 9,/PD[ 9'' 9 06Y 9 Figure 24.
PAGE 88
Electrical characteristics STM32L052x6 STM32L052x8 Output voltage levels Unless otherwise specified, the parameters given in Table 60 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 25. All I/Os are CMOS and TTL compliant. Table 60. Output voltage characteristics Symbol Parameter VOL(1) Output low level voltage for an I/O pin VOH(3) Output high level voltage for an I/O pin Conditions Min Max CMOS port(2), IIO = +8 mA 2.
PAGE 89
STM32L052x6 STM32L052x8 Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 25 and Table 61, respectively. Unless otherwise specified, the parameters given in Table 61 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 25. Table 61.
PAGE 90
Electrical characteristics STM32L052x6 STM32L052x8 Figure 25. I/O AC characteristics definition (;7(51$/ 287387 21 &/ WU ,2 RXW WI ,2 RXW 7 0D[LPXP IUHTXHQF\ LV DFKLHYHG LI WU WI 7 DQG LI WKH GXW\ F\FOH LV ZKHQ ORDGHG E\ &/ VSHFLILHG LQ WKH WDEOH ³ , 2 $& FKDUDFWHULVWLFV´ 6.3.14 DL G NRST pin characteristics The NRST pin input driver uses CMOS technology.
PAGE 91
STM32L052x6 STM32L052x8 Electrical characteristics Figure 26. Recommended NRST pin protection ([WHUQDO UHVHW FLUFXLW 9'' 538 1567 ,QWHUQDO UHVHW )LOWHU ) 06 9 1. The reset network protects the device against parasitic resets. 2. The external capacitor must be placed as close as possible to the device. 3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 62. Otherwise the reset will not be taken into account by the device. 6.3.
PAGE 92
Electrical characteristics STM32L052x6 STM32L052x8 Table 63. ADC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit RADC(3)(4) Sampling switch resistance - - - 1 kΩ CADC(3) Internal sample and hold capacitor - - - 8 pF tCAL(3)(5) Calibration time fADC = 16 MHz 5.2 µs - 83 1/fADC 1.5 ADC cycles + 2 fPCLK cycles - 1.5 ADC cycles + 3 fPCLK cycles - ADC clock = PCLK/2 - 4.5 - fPCLK cycle ADC clock = PCLK/4 - 8.
PAGE 93
STM32L052x6 STM32L052x8 Electrical characteristics Equation 1: RAIN max formula TS - – R ADC R AIN < --------------------------------------------------------------N+2 f ADC × C ADC × ln ( 2 ) The simplified formula above (Equation 1) is used to determine the maximum external impedance allowed for an error below 1/4 of LSB. Here N = 12 (from 12-bit resolution). Table 64. RAIN max for fADC = 16 MHz(1) Ts (cycles) tS (µs) RAIN max for fast channels (kΩ) 1.5 0.09 3.
PAGE 94
Electrical characteristics STM32L052x6 STM32L052x8 Table 65. ADC accuracy(1)(2)(3) (continued) Symbol Parameter Conditions Min Typ Max ET Total unadjusted error - 2 5 EO Offset error - 1 2.5 EG Gain error - 1 2 EL Integral linearity error - 1.5 3 - 1 2 1.65 V < VREF+ < VDDA < 3.6 V, range 1/2/3 ED Differential linearity error ENOB Effective number of bits 10.0 11.
PAGE 95
STM32L052x6 STM32L052x8 Electrical characteristics Figure 28. Typical connection diagram using the ADC 9''$ 97 5$,1 9$,1 $,1[ &SDUDVLWLF 97 6DPSOH DQG KROG $'& FRQYHUWHU 5$'& ELW FRQYHUWHU ,/ Q$ &$'& 06Y 9 1. Refer to Table 63: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy.
PAGE 96
Electrical characteristics STM32L052x6 STM32L052x8 Figure 30. Power supply and reference decoupling (VREF+ connected to VDDA) 670 /[[ 62%& 6$$! & N& 62%&n 633! 06 9 96/143 Downloaded from Arrow.com.
PAGE 97
STM32L052x6 STM32L052x8 6.3.16 Electrical characteristics DAC electrical characteristics Data guaranteed by design, not tested in production, unless otherwise specified. Table 66. DAC characteristics Symbol Parameter Conditions Min Typ Max Unit VDDA Analog supply voltage - 1.8 - 3.6 V VREF+ Reference supply voltage VREF+ must always be below VDDA 1.8 - 3.
PAGE 98
Electrical characteristics STM32L052x6 STM32L052x8 Table 66. DAC characteristics (continued) Symbol DNL(2) INL(2) Offset(2) Offset1(2) dOffset/dT(2) Gain(2) dGain/dT(2) TUE(2) 98/143 Downloaded from Arrow.com.
PAGE 99
STM32L052x6 STM32L052x8 Electrical characteristics Table 66.
PAGE 100
Electrical characteristics 6.3.17 STM32L052x6 STM32L052x8 Temperature sensor characteristics Table 67. Temperature sensor calibration values Calibration value name Description Memory address TS_CAL1 TS ADC raw data acquired at temperature of 30 °C, VDDA= 3 V TS_CAL2 TS ADC raw data acquired at 0x1FF8 007E - 0x1FF8 007F temperature of 130 °C, VDDA= 3 V 0x1FF8 007A - 0x1FF8 007B Table 68.
PAGE 101
STM32L052x6 STM32L052x8 Electrical characteristics Table 70. Comparator 2 characteristics Symbol VDDA VIN Conditions Min Typ Max(1) Unit Analog supply voltage - 1.65 - 3.6 V Comparator 2 input voltage range - 0 - VDDA V Fast mode - 15 20 Slow mode - 20 25 1.65 V ≤VDDA ≤2.7 V - 1.8 3.5 2.7 V ≤VDDA ≤3.6 V - 2.5 6 1.65 V ≤VDDA ≤2.7 V - 0.8 2 2.7 V ≤VDDA ≤3.6 V - 1.2 4 - ±4 ±20 mV VDDA = 3.3V, TA = 0 to 50 ° C, V- = VREFINT, 3/4 VREFINT, 1/2 VREFINT, 1/4 VREFINT.
PAGE 102
Electrical characteristics 6.3.19 STM32L052x6 STM32L052x8 Timer characteristics TIM timer characteristics The parameters given in the Table 71 are guaranteed by design. Refer to Section 6.3.13: I/O port characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 71.
PAGE 103
STM32L052x6 STM32L052x8 Electrical characteristics The analog spike filter is compliant with I2C timings requirements only for the following voltage ranges: • Fast mode Plus: 2.7 V ≤VDD ≤3.6 V and voltage scaling Range 1 • Fast mode: – 2 V ≤VDD ≤3.6 V and voltage scaling Range 1 or Range 2. – VDD < 2 V, voltage scaling Range 1 or Range 2, Cload < 200 pF. In other ranges, the analog filter should be disabled. The digital filter can be used instead.
PAGE 104
Electrical characteristics STM32L052x6 STM32L052x8 Table 73. SPI characteristics in voltage Range 1 (1) (continued) Symbol Parameter Conditions Min Typ Max tsu(NSS) NSS setup time Slave mode, SPI presc = 2 4*Tpclk - - th(NSS) NSS hold time Slave mode, SPI presc = 2 2*Tpclk - - tw(SCKH) tw(SCKL) SCK high and low time Master mode Tpclk-2 Tpclk Tpclk+ 2 Master mode 0 - - Slave mode 3 - - Master mode 7 - - Slave mode 3.
PAGE 105
STM32L052x6 STM32L052x8 Electrical characteristics Table 74. SPI characteristics in voltage Range 2 (1) Symbol Parameter Conditions Min Typ Master mode fSCK 1/tc(SCK) SPI clock frequency Slave mode Transmitter 1.65
PAGE 106
Electrical characteristics STM32L052x6 STM32L052x8 Table 75. SPI characteristics in voltage Range 3 (1) Symbol Parameter fSCK 1/tc(SCK) SPI clock frequency Duty(SCK) Duty cycle of SPI clock frequency tsu(NSS) Min Typ - - Slave mode 30 50 70 NSS setup time Slave mode, SPI presc = 2 4*Tpclk - - th(NSS) NSS hold time Slave mode, SPI presc = 2 2*Tpclk - - tw(SCKH) tw(SCKL) SCK high and low time Master mode Tpclk-2 Tpclk Tpclk+2 Master mode 1.
PAGE 107
STM32L052x6 STM32L052x8 Electrical characteristics Figure 32. SPI timing diagram - slave mode and CPHA = 0 166 LQSXW WF 6&. 6&. LQSXW WVX 166 WK 166 WZ 6&.+ WU 6&. &3+$ &32/ &3+$ &32/ WD 62 WZ 6&./ 0,62 RXWSXW WY 62 WK 62 )LUVW ELW 287 WI 6&. 1H[W ELWV 287 WGLV 62 /DVW ELW 287 WK 6, WVX 6, 026, LQSXW )LUVW ELW ,1 1H[W ELWV ,1 /DVW ELW ,1 06Y 9 Figure 33. SPI timing diagram - slave mode and CPHA = 1(1) 166 LQSXW 6&. LQSXW WF 6&. WVX 166 WZ 6&.+ WD 62 WZ 6&./ WI 6&.
PAGE 108
Electrical characteristics STM32L052x6 STM32L052x8 Figure 34. SPI timing diagram - master mode(1) +LJK 166 LQSXW 6&. 2XWSXW &3+$ &32/ 6&. 2XWSXW WF 6&. &3+$ &32/ &3+$ &32/ &3+$ &32/ WVX 0, 0,62 ,13 87 WZ 6&.+ WZ 6&./ 06% ,1 WU 6&. WI 6&. %,7 ,1 /6% ,1 WK 0, 026, 287387 06% 287 % , 7 287 WY 02 /6% 287 WK 02 DL G 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. 108/143 Downloaded from Arrow.com.
PAGE 109
STM32L052x6 STM32L052x8 Electrical characteristics I2S characteristics Table 76.
PAGE 110
Electrical characteristics STM32L052x6 STM32L052x8 Figure 35. I2S slave timing diagram (Philips protocol)(1) 1. Measurement points are done at CMOS levels: 0.3 × VDD and 0.7 × VDD. 2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. Figure 36. I2S master timing diagram (Philips protocol)(1) 1. Guaranteed by characterization results. 2. LSB transmit/receive of the previously transmitted byte.
PAGE 111
STM32L052x6 STM32L052x8 Electrical characteristics USB characteristics The USB interface is USB-IF certified (full speed). Table 77. USB startup time Symbol tSTARTUP Parameter (1) USB transceiver startup time Max Unit 1 µs 1. Guaranteed by design. Table 78. USB DC electrical characteristics Symbol Parameter Conditions Min.(1) Max.(1) Unit - 3.0 3.6 V 0.
PAGE 112
Electrical characteristics STM32L052x6 STM32L052x8 Table 79. USB: full speed electrical characteristics Driver characteristics(1) Symbol Parameter Conditions Min Max Unit tr Rise time(2) CL = 50 pF 4 20 ns tf (2) CL = 50 pF 4 20 ns tr/tf 90 110 % 1.3 2.0 V trfm VCRS Fall Time Rise/ fall time matching Output signal crossover voltage 1. Guaranteed by design. 2. Measured from 10% to 90% of the data signal.
PAGE 113
STM32L052x6 STM32L052x8 7 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at www.st.com. ECOPACK® is an ST trademark. 7.1 LQFP64 package information Figure 38.
PAGE 114
Package information STM32L052x6 STM32L052x8 Table 80. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D - 12.000 - - 0.4724 - D1 - 10.000 - - 0.3937 - D3 - 7.500 - - 0.2953 - E - 12.000 - - 0.
PAGE 115
STM32L052x6 STM32L052x8 Package information Figure 39. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat recommended footprint AI C 1. Dimensions are expressed in millimeters. DocID025936 Rev 8 115/143 136 Downloaded from Arrow.com.
PAGE 116
Package information STM32L052x6 STM32L052x8 Device marking for LQFP64 The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below. Figure 40. LQFP64 marking example (package top view) 5HYLVLRQ FRGH 3URGXFW LGHQWLILFDWLRQ 5 670 / 5 7 'DWH FRGH < :: 3LQ LQGHQWLILHU 06Y 9 2.
PAGE 117
STM32L052x6 STM32L052x8 7.2 Package information TFBGA64 package information Figure 41. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid array package outline $ EDOO LQGH[ DUHD $ EDOO LGHQWLILHU $ E EDOOV HHH 0 & % $ III 0 & % H ( ' ) + ' H ) $ ( %27720 9,(: 723 9,(: & 6HDWLQJ SODQH GGG & $ $ $ $ 6,'( 9,(: 5 B0(B9 1. Drawing is not to scale. Table 81. TFBGA64 – 64-ball, 5 x 5 mm, 0.
PAGE 118
Package information STM32L052x6 STM32L052x8 Table 81. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid array package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max ddd - - 0.080 - - 0.0031 eee - - 0.150 - - 0.0059 fff - - 0.050 - - 0.0020 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 42. TFBGA64 – 64-ball, 5 x 5 mm, 0.
PAGE 119
STM32L052x6 STM32L052x8 Package information Device marking for TFBGA64 The following figure gives an example of topside marking versus ball A 1 position identifier location. Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below. Figure 43. TFBGA64 marking example (package top view) 3URGXFW LGHQWLILFDWLRQ / 5 + 'DWH FRGH
PAGE 120
Package information 7.3 STM32L052x6 STM32L052x8 LQFP48 package information Figure 44. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM '!5'% 0,!.% CCC # + ! $ $ , , $ 0). )$%.4)&)#!4)/. 1. Drawing is not to scale. Downloaded from Arrow.com.
PAGE 121
STM32L052x6 STM32L052x8 Package information Table 83. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.
PAGE 122
Package information STM32L052x6 STM32L052x8 Device marking for LQFP48 The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below. Figure 46. LQFP48 marking example (package top view) 3URGXFW LGHQWLILFDWLRQ 670 / & 7 'DWH FRGH < :: 5HYLVLRQ FRGH 3LQ LQGHQWLILHU 5 06Y 9 2.
PAGE 123
STM32L052x6 STM32L052x8 7.4 Package information Standard WLCSP36 package information Figure 47. Standard WLCSP36 - 2.61 x 2.88 mm, 0.4 mm pitch wafer level chip scale package outline H EEE = $ EDOO ORFDWLRQ ) H * $ 'HWDLO $ H H ) $ $ $ %XPS VLGH 6LGH YLHZ %XPS $ RULHQWDWLRQ UHIHUHQFH HHH = DDD $ E EDOOV FFF = ; < GGG = [ :DIHU EDFN VLGH E = 6HDWLQJ SODQH 'HWDLO $ URWDWHG $
PAGE 124
Package information STM32L052x6 STM32L052x8 Table 84. Standard WLCSP36 - 2.61 x 2.88 mm, 0.4 mm pitch wafer level chip scale mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max - 0.305(3) - - 0.012 - G - 0.440(3) - - 0.017 - aaa - - 0.100 - - 0.004 bbb - - 0.100 - - 0.004 ccc - - 0.100 - - 0.004 ddd - - 0.050 - - 0.002 eee - - 0.050 - - 0.002 F 1.
PAGE 125
STM32L052x6 STM32L052x8 Package information Device marking for standard WLCSP36 The following figure gives an example of topside marking versus ball A 1 position identifier location. Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below. Figure 49. Standard WLCSP36 marking example (package top view) %DOO $ LGHQWLILHU 3URGXFW LGHQWLILFDWLRQ / 5HYLVLRQ FRGH 5 'DWH FRGH
PAGE 126
Package information 7.5 STM32L052x6 STM32L052x8 Thin WLCSP36 package information Figure 50. Thin WLCSP36 - 2.61 x 2.88 mm, 0.4 mm pitch wafer level chip scale package outline ) H * EEE = $ %DOO ORFDWLRQ $ '(7$,/ $ H H E H $ $ $ %27720 9,(: 6,'( 9,(: %803 ( $ $ 25,(17$7,21 5()(5(1&( ' HHH = DDD E [ FFF = ; < GGG = 723 9,(: 6($7,1* 3/$1( '(7$,/ $ 527$7(' $ B0(B9 1. Drawing is not to scale. 2.
PAGE 127
STM32L052x6 STM32L052x8 Package information Table 86. Thin WLCSP36 - 2.61 x 2.88 mm, 0.4 mm pitch wafer level chip scale package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 0.33 - - 0.013 A1 - 0.10 - - 0.004 - A2 - 0.20 - - 0.008 - - - 0.001 - (2) A3 - 0.025 b 0.16 0.19 0.22 0.006 0.007 0.009 D 2.59 2.61 2.63 0.102 0.103 0.104 E 2.86 2.88 2.90 0.112 0.113 0.114 e - 0.40 - - 0.016 - e1 - 2.00 - - 0.
PAGE 128
Package information STM32L052x6 STM32L052x8 Table 87. WLCSP36 recommended PCB design rules Dimension 7.6 Recommended values Pitch 0.4 mm Dpad 260 µm max. (circular) 220 µm recommended Dsm 300 µm min. (for 260 µm diameter pad) PCB pad design Non-solder mask defined via underbump allowed LQFP32 package information Figure 52. LQFP32 - 32-pin, 7 x 7 mm low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM CCC '!5'% 0,!.% # + $ ! , $ , $ 0).
PAGE 129
STM32L052x6 STM32L052x8 Package information Table 88. LQFP32 - 32-pin, 7 x 7 mm low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.
PAGE 130
Package information STM32L052x6 STM32L052x8 Device marking for LQFP32 The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below. Figure 54. LQFP32 marking example (package top view) 670 / 3URGXFW LGHQWLILFDWLRQ . 7 'DWH FRGH < :: 5HYLVLRQ FRGH 3LQ LQGHQWLILHU 5 06Y 9 2.
PAGE 131
STM32L052x6 STM32L052x8 7.7 Package information UFQFPN32 package information Figure 55. UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline ' $ H ' $ $ GGG & & 6($7,1* 3/$1( E H ( E ( ( / 3,1 ,GHQWLILHU ' / ! " ?-%?6 1. Drawing is not to scale. DocID025936 Rev 8 131/143 136 Downloaded from Arrow.com.
PAGE 132
Package information STM32L052x6 STM32L052x8 Table 89. UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 0.000 0.020 0.050 0.0000 0.0008 0.0020 A3 - 0.152 - - 0.0060 - b 0.180 0.230 0.280 0.0071 0.0091 0.0110 D 4.900 5.000 5.100 0.1929 0.1969 0.2008 D1 3.400 3.500 3.600 0.1339 0.1378 0.1417 D2 3.400 3.500 3.600 0.
PAGE 133
STM32L052x6 STM32L052x8 Package information Device marking for UFQFPN32 The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below. Figure 57. UFQFPN32 marking example (package top view) 3URGXFW LGHQWLILFDWLRQ / . 'DWH FRGH
PAGE 134
Package information 7.8 STM32L052x6 STM32L052x8 Thermal characteristics The maximum chip-junction temperature, TJ max, in degrees Celsius, may be calculated using the following equation: TJ max = TA max + (PD max × ΘJA) Where: • TA max is the maximum ambient temperature in ° C, • ΘJA is the package junction-to-ambient thermal resistance, in ° C/W, • PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/Omax), • PINT max is the product of IDD and VDD, expressed in Watts.
PAGE 135
STM32L052x6 STM32L052x8 Package information Figure 58. Thermal resistance ϰϬϬϬ ϯϱϬϬ ϯϬϬϬ 3' P: hY&EϯϮ >Y&Wϲϰ ϮϱϬϬ >Y&Wϰϴ >Y&WϯϮ ϮϬϬϬ d& ' ϲϰ ^ƚĂŶĚĂƌĚ t> ^Wϯϲ dŚŝŶ t> ^Wϯϲ ϭϱϬϬ ϭϬϬϬ ϱϬϬ Ϭ ϭϮϱ ϭϬϬ ϳϱ ϱϬ Ϯϱ Ϭ 7HPSHUDWXUH & 06Y 9 7.8.1 Reference document JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air). Available from www.jedec.org. DocID025936 Rev 8 135/143 136 Downloaded from Arrow.com.
PAGE 136
Ordering information 8 STM32L052x6 STM32L052x8 Ordering information Table 91.
PAGE 137
STM32L052x6 STM32L052x8 9 Revision history Revision history Table 92. Document revision history Date Revision 27-Feb2014 1 Initial release. 2 Added WLCSP36 package. Updated Table 2: Ultra-low-power STM32L052x6/x8 device features and peripheral counts Updated Figure 4: STM32L052x6/8 TFBGA64 ballout - 5x 5 mm. Updated Table 5: Functionalities depending on the working mode (from Run/active down to standby). Added Section 3.2: Interconnect matrix.
PAGE 138
Revision history STM32L052x6 STM32L052x8 Table 92. Document revision history (continued) Date 25-Jun2014 138/143 Downloaded from Arrow.com. Revision Changes 3 Cover page: changed LQFP32 size, updated core speed, added minimum supply voltage for ADC, DAC and comparators. ADC now guaranteed down to 1.65 V. Updated list of applications in Section 1: Introduction. Changed number of I2S interfaces to one in Section 2: Description.
PAGE 139
STM32L052x6 STM32L052x8 Revision history Table 92. Document revision history (continued) Date 05-Sep2014 Revision Changes 4 Extended operating temperature range to 125 °C. Updated minimum ADC operating voltage to 1.65 V. Changed number of I2S interface from 1 to 0 in Table 2: Ultra-low-power STM32L052x6/x8 device features and peripheral counts.
PAGE 140
Revision history STM32L052x6 STM32L052x8 Table 92. Document revision history (continued) Date 23-Jul2015 140/143 Downloaded from Arrow.com. Revision Changes 5 Updated all pinout/ballout schematics except for LQFP32 to highlight pin/ball supplied through VDD_USB. Updated Table 16: STM32L052x6/8 pin definitions PC5 as FT pin. Updated Figure 5: STM32L052x6/8 LQFP48 pinout - 7 x 7 mm, Figure 3: STM32L052x6/8 LQFP64 pinout - 10 x 10 mm and Figure 4: STM32L052x6/8 TFBGA64 ballout - 5x 5 mm.
PAGE 141
STM32L052x6 STM32L052x8 Revision history Table 92. Document revision history (continued) Date 11-Mar2016 Revision 6 Changes Updated number of SPIs on cover page and in Table 2: Ultra-low-power STM32L052x6/x8 device features and peripheral counts. Changed minimum comparator supply voltage to 1.65 V on cover page. Added number of fast and standard channels in Section 3.11: Analog-todigital converter (ADC). Updated Section 3.18.
PAGE 142
Revision history STM32L052x6 STM32L052x8 Table 92. Document revision history (continued) Date 07-Mar2017 Revision 7 Changes Added thin WLCSP36 package. Updated number of I2S interfaces and removed I2S for STM32L052T8 in Table 2: Ultra-low-power STM32L052x6/x8 device features and peripheral counts. In Section 4: Pin descriptions, renamed USB_OE into USB_NOE. Added mission profile compliance with JEDEC JESD47 in Section 6.2: Absolute maximum ratings. Added note 2.
PAGE 143
STM32L052x6 STM32L052x8 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.