Datasheet

Functional overview STM32L031x4/6
22/126 DS10668 Rev 6
internal reference voltage (V
REFINT
) in Stop mode. The device remains in reset mode when
V
DD
is below a specified threshold, V
POR/PDR
or V
BOR
, without the need for any external
reset circuit.
Note: The start-up time at power-on is typically 3.3 ms when BOR is active at power-up, the start-
up time at power-on can be decreased down to 1 ms typically for devices with BOR inactive
at power-up.
The devices feature an embedded programmable voltage detector (PVD) that monitors the
V
DD/VDDA
power supply and compares it to the V
PVD
threshold. This PVD offers 7 different
levels between 1.85 V and 3.05 V, chosen by software, with a step around 200 mV. An
interrupt can be generated when V
DD/VDDA
drops below the V
PVD
threshold and/or when
V
DD/VDDA
is higher than the V
PVD
threshold. The interrupt service routine can then generate
a warning message and/or put the MCU into a safe state. The PVD is enabled by software.
3.4.3 Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
MR is used in Run mode (nominal regulation)
LPR is used in the Low-power run, Low-power sleep and Stop modes
Power down is used in Standby mode. The regulator output is high impedance, the
kernel circuitry is powered down, inducing zero consumption but the contents of the
registers and RAM are lost except for the standby circuitry (wakeup logic, IWDG, RTC,
LSI, LSE crystal 32 KHz oscillator, RCC_CSR).
3.4.4 Boot modes
At startup, BOOT0 pin and nBOOT1 option bit are used to select one of three boot options:
Boot from Flash memory
Boot from System memory
Boot from embedded RAM
The boot loader is located in System memory. It is used to reprogram the Flash memory by
using SPI1 (PA4, PA5, PA6, PA7), USART2 (PA2, PA3) or USART2 (PA9, PA10). See
STM32™ microcontroller system memory boot mode AN2606 for details.
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