STM32L031x4 STM32L031x6 Access line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0+, up to 32KB Flash, 8KB SRAM, 1KB EEPROM, ADC Datasheet - production data Features • • • • • • • • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.23 µA Standby mode (2 wakeup pins) – 0.35 µA Stop mode (16 wakeup lines) – 0.
Contents STM32L031x4/6 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.2 Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Functional overview . . . . .
STM32L031x4/6 3.16 Contents Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.16.1 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.16.2 Universal synchronous/asynchronous receiver transmitter (USART) . . 31 3.16.3 Low-power universal asynchronous receiver transmitter (LPUART) . . . 32 3.16.4 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents 7 STM32L031x4/6 6.3.15 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.3.16 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 6.3.17 Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 6.3.18 Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 6.3.19 Communications interfaces . . . . . . .
STM32L031x4/6 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Device summary . . . . . . . . . .
List of tables Table 45. Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. 6/126 Downloaded from Arrow.com. STM32L031x4/6 RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STM32L031x4/6 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41.
List of figures Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. Figure 55. 8/126 Downloaded from Arrow.com. STM32L031x4/6 Example of LQFP32 marking (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STM32L031x4/6 1 Introduction Introduction The ultra-low-power STM32L031x4/6 family includes devices in 6 different packages from 20 to 48 pins. The description below gives an overview of the complete range of peripherals proposed in this family.
Description 2 STM32L031x4/6 Description The access line ultra-low-power STM32L031x4/6 family incorporates the high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at a 32 MHz frequency, high-speed embedded memories (up to 32 Kbytes of Flash program memory, 1 Kbytes of data EEPROM and 8 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals. The STM32L031x4/6 devices provide high power efficiency for a wide range of performance.
2.1 Downloaded from Arrow.com. 27(2) 38 STM32 L031C4 1 LPTIMER DS10668 Rev 6 Operating voltage Max. CPU frequency 15 20 STM32 L031E6 21(23)(3) 32 STM32 L031G6 1.8 V to 3.6 V (down to 1.65 V at power-down) with BOR option 1.65 V to 3.
/126 Downloaded from Arrow.com. TSSOP 20 STM32 L031F4 WLCSP 25 STM32 L031E4 4. HSE external quartz connexion available only on LQFP48. 3. 23 GPIOs are available only on STM32L031GxUxS part number. 2. LQFP32 has two GPIOs, less than UFQFPN32 (27). STM32 L031C4 STM32 L031F6 STM32 L031E6 TSSOP 20 WLCSP 25 Ambient temperature: –40 to +125 °C Junction temperature: –40 to +130 °C STM32 L031K4 LQFP32, LQFP48/ UFQFPN UFQFPN UFQFPN 28 32 48 STM32 L031G4 1.
STM32L031x4/6 Description Figure 1. STM32L031x4/6 block diagram 7HPS VHQVRU 6:' 6:' )/$6+ ((3520 %227 &257(; 0 &38 )PD[ 0+] $'& $,1[ 63, 0,62 026, 6&. 166 5$0 '%* '0$ 19,& (;7, $ 3 % 7,0 FK 7,0 FK %5,'*( &203 ,13 ,10 287 &203 ,13 ,10 287 /37,0 ,1 ,1 (75 287 &5& %5,'*( *3,2 3257 $ 3%> @ *3,2 3257 % 3&> @ 3& *3,2 3257 & 3+> @ 26&B,1 26&B287 &.
Description 2.2 STM32L031x4/6 Ultra-low-power device continuum The ultra-low-power family offers a large choice of core and features, from 8-bit proprietary core up to Arm® Cortex®-M4, including Arm® Cortex®-M3 and Arm® Cortex®-M0+. The STM32Lx series are the best choice to answer your needs in terms of ultra-low-power features. The STM32 Ultra-low-power series are the best solution for applications such as gas/water meter, keyboard/mouse or fitness and healthcare application.
STM32L031x4/6 Functional overview 3 Functional overview 3.1 Low-power modes The ultra-low-power STM32L031x4/6 supports dynamic voltage scaling to optimize its power consumption in Run mode. The voltage from the internal low-drop regulator that supplies the logic can be adjusted according to the system’s maximum operating frequency and the external voltage supply. There are three power consumption ranges: • Range 1 (VDD range limited to 1.71-3.
Functional overview STM32L031x4/6 (if internal reference voltage is on), it can be the RTC alarm/tamper/timestamp/wakeup events, the USART/I2C/LPUART/LPTIMER wakeup events. • Stop mode without RTC The Stop mode achieves the lowest power consumption while retaining the RAM and register contents. All clocks are stopped, the PLL, MSI RC, HSI and LSI RC, HSE and LSE crystal oscillators are disabled.
STM32L031x4/6 Functional overview Table 3. Functionalities depending on the operating power supply range Operating power supply range(1) Functionalities depending on the operating power supply range ADC operation Dynamic voltage scaling range VDD = 1.65 to 1.71 V Conversion time up to 570 ksps Range 2 or range 3 VDD = 1.71 to 2.0 V(2) Conversion time up to 1.14 Msps Range 1, range 2 or range 3 VDD = 2.0 to 2.4 V Conversion time up to 1.14 Msps Range 1, range 2 or range 3 VDD = 2.4 to 3.
Functional overview STM32L031x4/6 Table 5.
STM32L031x4/6 Functional overview Table 5. Functionalities depending on the working mode (from Run/active down to standby) (continued)(1) IPs Run/Active Sleep Lowpower run 0 µs 0.36 µs 3 µs Wakeup time to Run mode Lowpower sleep 32 µs Stop Standby Wakeup capability 3.5 µs Wakeup capability 65 µs 0.23 µA (No 0.35 µA (No RTC) VDD=1.8 V RTC) VDD=1.8 V Consumption VDD=1.8 to 3.6 V (Typ) Down to 115 µA/MHz (from Flash) Down to 25 µA/MHz (from Flash) Down to 6.5 µA 0.39 µA (with 0.
Functional overview STM32L031x4/6 Table 6.
STM32L031x4/6 Functional overview Nested vectored interrupt controller (NVIC) The ultra-low-power STM32L031x4/6 embed a nested vectored interrupt controller able to handle up to 32 maskable interrupt channels and 4 priority levels. The Cortex-M0+ processor closely integrates a configurable Nested Vectored Interrupt Controller (NVIC), to deliver industry-leading interrupt performance.
Functional overview STM32L031x4/6 internal reference voltage (VREFINT) in Stop mode. The device remains in reset mode when VDD is below a specified threshold, VPOR/PDR or VBOR, without the need for any external reset circuit. Note: The start-up time at power-on is typically 3.3 ms when BOR is active at power-up, the startup time at power-on can be decreased down to 1 ms typically for devices with BOR inactive at power-up.
STM32L031x4/6 3.5 Functional overview Clock management The clock controller distributes the clocks coming from different oscillators to the core and the peripherals. It also manages clock gating for low-power modes and ensures clock robustness. It features: • Clock prescaler To get the best trade-off between speed and current consumption, the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.
Functional overview STM32L031x4/6 Figure 2. Clock tree #9 (QDEOH :DWFKGRJ /6, 5& :DWFKGRJ /6 /6, WHPSR /HJHQG +6( +LJK VSHHG H[WHUQDO FORFN VLJQDO +6, +LJK VSHHG LQWHUQDO FORFN VLJQDO /6, /RZ VSHHG LQWHUQDO FORFN VLJQDO /6( /RZ VSHHG H[WHUQDO FORFN VLJQDO 06, 0XOWLVSHHG LQWHUQDO FORFN VLJQDO 57&6(/ 57& HQDEOH /6( 26& 57& /6( WHPSR /68 /6' /6' #9 0+] #9 06, 5& /6, /6( 06, /HYHO VKLIWHUV #9 0&26(/ $'& HQDEOH $'&&/.
STM32L031x4/6 3.6 Functional overview Low-power real-time clock and backup registers The real time clock (RTC) and the 5 backup registers are supplied in all modes including standby mode. The backup registers are five 32-bit registers used to store 20 bytes of user application data. They are not reset by a system reset, or when the device wakes up from Standby mode. The RTC is an independent BCD timer/counter.
Functional overview 3.8 STM32L031x4/6 Extended interrupt/event controller (EXTI) The extended interrupt/event controller consists of 26 edge detector lines used to generate interrupt/event requests. Each line can be individually configured to select the trigger event (rising edge, falling edge, both) and can be masked independently. A pending register maintains the status of the interrupt requests. The EXTI can detect an external line with a pulse width shorter than the Internal APB2 clock period.
STM32L031x4/6 3.11 Functional overview Analog-to-digital converter (ADC) A native 12-bit, extended to 16-bit through hardware oversampling, analog-to-digital converter is embedded into STM32L031x4/6 devices. It has up to 10 external channels and 3 internal channels (temperature sensor, voltage reference). Three channel are fast channel, PA0, PA4 and PA5, while the others are standard channels. It performs conversions in single-shot or scan mode.
Functional overview 3.12.1 STM32L031x4/6 Internal voltage reference (VREFINT) The internal voltage reference (VREFINT) provides a stable (bandgap) voltage output for the ADC and Comparators. VREFINT is internally connected to the ADC_IN17 input channel. It enables accurate monitoring of the VDD value (since no external voltage, VREF+, is available for ADC). The precise voltage of VREFINT is individually measured for each part by ST during production test and stored in the system memory area.
STM32L031x4/6 3.15 Functional overview Timers and watchdogs The ultra-low-power STM32L031x4/6 devices include three general-purpose timers, one low- power timer (LPTM), two watchdog timers and the SysTick timer. Table 9 compares the features of the general-purpose and basic timers. Table 9.
Functional overview 3.15.2 STM32L031x4/6 Low-power timer (LPTIM) The low-power timer has an independent clock and is running also in Stop mode if it is clocked by LSE, LSI or an external clock. It is able to wakeup the devices from Stop mode. This low-power timer supports the following features: 3.15.
STM32L031x4/6 Functional overview 3.16 Communication interfaces 3.16.1 I2C bus One I2C interface (I2C1) can operate in multimaster or slave modes. The I2C interface can support Standard mode (Sm, up to 100 kbit/s), Fast mode (Fm, up to 400 kbit/s) and Fast Mode Plus (Fm+, up to 1 Mbit/s) with 20 mA output drive on some I/Os. The I2C interface supports 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (2 addresses, 1 with configurable mask).
Functional overview 3.16.2 STM32L031x4/6 Universal synchronous/asynchronous receiver transmitter (USART) The USART interface (USART2) is able to communicate at speeds of up to 4 Mbit/s. it provides hardware management of the CTS, RTS and RS485 driver enable (DE) signals, multiprocessor communication mode, master synchronous communication and single-wire half-duplex communication mode.
STM32L031x4/6 Functional overview having an extremely low energy consumption. Higher speed clock can be used to reach higher baudrates. LPUART interface can be served by the DMA controller. 3.16.4 Serial peripheral interface (SPI) The SPI is able to communicate at up to 16 Mbits/s in slave and master modes in full-duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame is configurable to 8 bits or 16 bits.
Pin descriptions 4 STM32L031x4/6 Pin descriptions 3& 3& 3& 26& B,1 3& 26& B287 3+ 26&B,1 3+ 26&B287 1567 966$ 9''$ 3$ 966 9'' 966 3$ 3$ 3$ 3$ 3$ 3$ 3% 3% 3% 3% 3$ 3$ 3$ 3$ 3$ 3% 3% 3% 3% 3% 966 9'' 3$ 3$ 3$ 9'' 966 3% 3% %227 3% 3% 3% 3% 3% 3$ Figure 3. STM32L031x4/6 UFQFPN48 06Y 9 1.
STM32L031x4/6 Pin descriptions 9'' 96 6 3% 3% %2 2 7 3% 3% 3% 3% 3% 3$ 3$ Figure 4.
Pin descriptions STM32L031x4/6 3% 3% 3% 3% 3% 3$ 3% %227 Figure 6. STM32L031x4/6 UFQFPN32 pinout 966 3$ 3$ 3$ 3$ 3$ 3$ 3$ 9'' 3$ 3$ 3$ 3$ 3$ 3% 3% 3% 9'' 3& 26& B,1 3& 26& B287 1567 9''$ 3$ &.B,1 3$ 3$ 06Y 9 1. The above figure shows the package top view. 9'' 3$ 3$ 3% 3% 3% %227 966 Figure 7.
STM32L031x4/6 Pin descriptions %227 3$ 3$ 3% 3% 3% 3% 3% Figure 8. STM32L031 UFQFPN28 pinout 3$ 3$ 1567 3$ 9''$ 9'' 966 3% 3$ 3$ 3$ 3$ &.B,1 3% 3& 26& B287 3$ 3$ 3$ 3$ 3$ 3& 26& B,1 06Y 9 1. The above figure shows the package top view. 2. This pinout applies only to STM32L031GxUxS part number. Figure 9.
Pin descriptions STM32L031x4/6 Figure 10. STM32L031x4/6 WLCSP25 pinout $ 3$ 3$ 3% 3% %227 % 3$ 3% 3$ 3$ 3& 26& B ,1 & 3$ 3$ 3$ 9''$ 3& 26& B287 ' 9'' 3% 3$ 3$ 1567 ( 966$ 3% 3$ 3$ &.B,1 3$ 06Y 9 1. The above figure shows the package top view. Table 14.
STM32L031x4/6 Pin descriptions Table 15.
Pin descriptions STM32L031x4/6 Table 15. Pin definitions (continued) 8 9 10 11 12 B4 D4 E4 B3 D3 E3 40/126 Downloaded from Arrow.com.
STM32L031x4/6 Pin descriptions Table 15.
Pin descriptions STM32L031x4/6 Table 15.
STM32L031x4/6 Pin descriptions Table 15.
Pin descriptions STM32L031x4/6 Table 15.
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STM32L031x4/6 5 Memory mapping Memory mapping Refer to the product line reference manual for details on the memory mapping as well as the boundary addresses for all peripherals. DS10668 Rev 6 47/126 47 Downloaded from Arrow.com.
Electrical characteristics STM32L031x4/6 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 6.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
STM32L031x4/6 6.1.6 Electrical characteristics Power supply scheme Figure 13. Power supply scheme 287 *3 , 2V ,1 9'' 9'' /HYHO VKLIWHU 6WDQGE\ SRZHU FLUFXLWU\ 26& 57& :DNH XS ORJLF 57& EDFNXS UHJLVWHUV ,2 /RJLF .HUQHO ORJLF &38 'LJLWDO 0HPRULHV 5HJXODWRU 1 î Q) î ) 966 9''$ 9''$ Q) ) $'& $QDORJ 5& 3// &203 « 966$ 06Y 9 6.1.7 Current consumption measurement Figure 14.
Electrical characteristics 6.2 STM32L031x4/6 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 17: Voltage characteristics, Table 18: Current characteristics, and Table 19: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
STM32L031x4/6 Electrical characteristics Table 18. Current characteristics Symbol Ratings Max.
Electrical characteristics STM32L031x4/6 6.3 Operating conditions 6.3.1 General operating conditions Table 20. General operating conditions Symbol Parameter Conditions Min Max fHCLK Internal AHB clock frequency - 0 32 fPCLK1 Internal APB1 clock frequency - 0 32 fPCLK2 Internal APB2 clock frequency - 0 32 BOR detector disabled 1.65 3.6 BOR detector enabled, at power on 1.8 3.6 BOR detector disabled, after power on 1.65 3.6 Must be the same voltage as VDD(1) 1.65 3.6 2.
STM32L031x4/6 Electrical characteristics Table 20.
Electrical characteristics STM32L031x4/6 Table 21. Embedded reset and power control block characteristics (continued) Symbol Parameter VBOR3 Brown-out reset threshold 3 VBOR4 Brown-out reset threshold 4 VPVD0 Programmable voltage detector threshold 0 VPVD1 PVD threshold 1 VPVD2 PVD threshold 2 VPVD3 PVD threshold 3 VPVD4 PVD threshold 4 VPVD5 PVD threshold 5 VPVD6 PVD threshold 6 Vhyst Hysteresis voltage Conditions Min Typ Max Falling edge 2.45 2.55 2.6 Rising edge 2.54 2.
STM32L031x4/6 6.3.3 Electrical characteristics Embedded internal reference voltage The parameters given in Table 23 are based on characterization results, unless otherwise specified. Table 22. Embedded internal reference voltage calibration values Calibration value name VREFINT_CAL Description Memory address Raw data acquired at temperature 0x1FF8 0078 - 0x1FF8 0079 of 25 °C, VDDA= 3 V Table 23.
Electrical characteristics 6.3.4 STM32L031x4/6 Supply current characteristics The current consumption is a function of several parameters and factors such as the operating voltage, temperature, I/O pin loading, device software configuration, operating frequencies, I/O pin switching rate, program location in memory and executed binary code. The current consumption is measured as described in Figure 14: Current consumption measurement scheme.
STM32L031x4/6 Electrical characteristics Table 24. Current consumption in Run mode, code with data processing running from Flash memory Symbol Parameter fHCLK Typ Max(1) 1 MHz 140 200 2 MHz 245 310 4 MHz 460 540 4 MHz 0.56 0.63 8 MHz 1.1 1.2 16 MHz 2.1 2.3 8 MHz 1.25 1.4 16 MHz 2.5 2.7 32 MHz 5 5.6 Range 2, VCORE = 1.5 V, VOS[1:0] = 10, 16 MHz 2.1 2.4 Range 1, VCORE = 1.8 V, VOS[1:0] = 01 32 MHz 5.1 5.7 65 kHz 34.5 110 524 kHz 86 150 4.
Electrical characteristics STM32L031x4/6 Figure 15. IDD vs VDD, at TA= 25/55/85/105 °C, Run mode, code running from Flash memory, Range 2, HSE = 16 MHz, 1WS ,'' ( ( ( ( ( 9'' 'KU\VWRQH :6 ± & 'KU\VWRQH :6 & 'KU\VWRQH :6 & 'KU\VWRQH :6 & 'KU\VWRQH :6 & 'KU\VWRQH :6 & 06Y 9 Figure 16.
STM32L031x4/6 Electrical characteristics Table 26. Current consumption in Run mode, code with data processing running from RAM Symbol Parameter fHCLK Typ Max(1) 1 MHz 115 170 2 MHz 210 250 4 MHz 385 420 4 MHz 0.48 0.6 8 MHz 0.935 1.1 16 MHz 1.8 2 8 MHz 1.1 1.3 16 MHz 2.1 2.3 32 MHz 4.5 4.7 65 kHz 22 52 524 kHz 70.5 91 4.2 MHz 420 450 Range 2, VCORE = 1.5 V, VOS[1:0] = 10 16 MHz 1.95 2.2 Range 1, VCORE = 1.
Electrical characteristics STM32L031x4/6 Table 28. Current consumption in Sleep mode Symbol Parameter Conditions Range 3, VCORE = 1.2 V, VOS[1:0] = 11 fHSE = fHCLK up to Range 2, 16 MHz included, VCORE = 1.5 V, fHSE = fHCLK/2 above 16 MHz (PLL VOS[1:0] = 10 ON)(2) Supply current in Sleep mode, Flash memory OFF Range 1, VCORE = 1.8 V, VOS[1:0] = 01 Range 2, VCORE = 1.5 V, HSI16 clock source VOS[1:0] = 10 (16 MHz) Range 1, VCORE = 1.8 V, VOS[1:0] = 01 MSI clock Range 3, VCORE = 1.
STM32L031x4/6 Electrical characteristics Table 29. Current consumption in Low-power run mode Symbol Parameter Typ Max(1) TA = -40 °C to 25 °C 6.3 8.4 TA = 85 °C 9.15 13 TA = 105 °C 12.5 19 TA = 125 °C 20.5 36 TA =-40 °C to 25 °C 9.45 12 TA = 85 °C 12.5 15 TA = 105 °C 16 22 TA = 125 °C 24 38 TA = -40 °C to 25 °C 17 20 TA = 55 °C 19 21 TA = 85 °C 20.5 24 TA = 105 °C 23.5 28 TA = 125 °C 31.5 46 TA = -40 °C to 25 °C 18.
Electrical characteristics STM32L031x4/6 Figure 17. IDD vs VDD, at TA= 25/55/ 85/105/125 °C, Low-power run mode, code running from RAM, Range 3, MSI (Range 0) at 64 KHz, 0 WS ,'' ( ( ( ( ( ( 9'' & & & & & & 06Y 9 Table 30. Current consumption in Low-power sleep mode Symbol Parameter Typ Max(1) 3.2(2) - TA = -40 °C to 25 °C 13 19 TA = 85 °C 16 21 TA = 105 °C 18.5 24 TA = 125 °C 23.
STM32L031x4/6 Electrical characteristics Table 31. Typical and maximum current consumptions in Stop mode Symbol Parameter Conditions IDD (Stop) Supply current in Stop mode Typ Max(1) Unit TA = -40°C to 25°C 0.38 0.99 TA = 55°C 0.54 1.9 TA= 85°C 1.35 4.2 TA = 105°C 3.1 9 TA = 125°C 7.55 19 µA 1. Guaranteed by characterization results at 125 °C, unless otherwise specified. Figure 18.
Electrical characteristics STM32L031x4/6 Table 32. Typical and maximum current consumptions in Standby mode Symbol Parameter Typ Max(1) TA = -40 °C to 25 °C 0.8 1.6 TA = 55 °C 0.9 1.8 TA= 85 °C 1 2 TA = 105 °C 1.3 3 TA = 125 °C 2.15 7 TA = -40 °C to 25 °C 0.255 0.6 TA = 55 °C 0.28 0.7 TA = 85 °C 0.405 1 TA = 105 °C 0.7 1.7 TA = 125 °C 1.
STM32L031x4/6 Electrical characteristics On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in the following tables. The MCU is placed under the following conditions: • all I/O pins are in input mode with a static value at VDD or VSS (no load) • all peripherals are disabled unless otherwise mentioned • the given value is calculated by measuring the current consumption – with all peripherals clocked off – with only one peripheral clocked on Table 34.
Electrical characteristics STM32L031x4/6 Table 35. Peripheral current consumption in Stop and Standby mode(1) Symbol Typical consumption, TA = 25 °C Peripheral IDD(PVD / BOR) - IREFINT (2) - LSE Low drive VDD=1.8 V VDD=3.0 V 0.7 1.2 1.3 1.4 0.1 0.1 - LSI 0.27 0.31 - IWDG 0.2 0.3 - LPTIM1, Input 100 Hz 0.01 0.01 - LPTIM1, Input 1 MHz 6 6 - LPUART1 0.2 0.2 - RTC (LSE in Bypass mode) 0.2 0.2 Unit µA 1.
STM32L031x4/6 Electrical characteristics Table 36. Low-power mode wakeup timings Symbol tWUSLEEP Parameter Conditions Typ Max fHCLK = 32 MHz 7 8 fHCLK = 262 kHz Flash memory enabled 7 8 fHCLK = 262 kHz Flash memory switched OFF 9 10 5.0 8 4.9 7 8.0 11 fHCLK = fMSI = 4.2 MHz Voltage range 1 5.0 8 fHCLK = fMSI = 4.2 MHz Voltage range 2 5.0 8 fHCLK = fMSI = 4.2 MHz Voltage range 3 5.0 8 7.
Electrical characteristics 6.3.6 STM32L031x4/6 External clock source characteristics High-speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a standard GPIO.The external clock signal has to respect the I/O characteristics in Section 6.3.12. However, the recommended clock input waveform is shown in Figure 20. Table 37.
STM32L031x4/6 Electrical characteristics Low-speed external user clock generated from an external source The characteristics given in the following table result from tests performed using a lowspeed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 20. Table 38.
Electrical characteristics STM32L031x4/6 High-speed external clock generated from a crystal/ceramic resonator The high-speed external (HSE) clock can be supplied with a 1 to 25 MHz crystal/ceramic resonator oscillator (LQFP48 package only). All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 39.
STM32L031x4/6 Electrical characteristics Low-speed external clock generated from a crystal/ceramic resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 40.
Electrical characteristics 6.3.7 STM32L031x4/6 Internal clock source characteristics The parameters given in Table 41 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 20. High-speed internal 16 MHz (HSI16) RC oscillator Table 41.
STM32L031x4/6 Electrical characteristics Figure 24. HSI16 minimum and maximum value versus temperature 9 PLQ 9 W\S 9 PD[ 9 PD[ 9 PLQ 06Y 9 Low-speed internal (LSI) RC oscillator Table 42.
Electrical characteristics STM32L031x4/6 Table 43. MSI oscillator characteristics (continued) Symbol Parameter Condition Typ DTEMP(MSI)(1) MSI oscillator frequency drift 0 °C ≤TA ≤85 °C - ±3 - % DVOLT(MSI)(1) MSI oscillator frequency drift 1.65 V ≤VDD ≤3.6 V, TA = 25 °C - - 2.5 %/V MSI range 0 0.75 - MSI range 1 1 - MSI range 2 1.5 - MSI range 3 2.5 - MSI range 4 4.
STM32L031x4/6 6.3.8 Electrical characteristics PLL characteristics The parameters given in Table 44 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 20. Table 44.
Electrical characteristics STM32L031x4/6 Table 46. Flash memory and data EEPROM characteristics Symbol IDD Min Typ Max(1) Unit Average current during the whole programming / erase operation - 500 700 µA Maximum current (peak) TA = 25 °C, VDD = 3.6 V during the whole programming / erase operation - 1.5 2.5 mA Parameter Conditions 1. Guaranteed by design. Table 47.
STM32L031x4/6 6.3.10 Electrical characteristics EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs.
Electrical characteristics STM32L031x4/6 To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Electromagnetic Interference (EMI) The electromagnetic field emitted by the device are monitored while a simple application is executed (toggling 2 LEDs through the I/O ports).
STM32L031x4/6 Electrical characteristics Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage is applied to each power supply pin • A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78A IC latch-up standard. Table 51. Electrical sensitivities Symbol LU 6.3.
Electrical characteristics 6.3.13 STM32L031x4/6 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 53 are derived from tests performed under the conditions summarized in Table 20. All I/Os are CMOS and TTL compliant. Table 53.
STM32L031x4/6 Electrical characteristics Figure 25. VIH/VIL versus VDD (CMOS I/Os) 9,/ 9,+ 9 LQV DOO S 9 '' 3+ 3& 9 ,+PLQ W %227 IRU S H[FH 9 '' + 3 9 ,+PLQ 3& 7 %22 9 ' ' PLQ 9,+PLQ LUH UHTX DUG WDQG 6 V &02 WV 9 ,+ PHQ 9 ,/PD[ ' 9 ' ,QSXW UDQJH QRW JXDUDQWHHG &026 VWDQGDUG UHTXLUHPHQWV 9,/PD[ 9'' 9,/PD[ 9'' 9 06Y 9 Figure 26.
Electrical characteristics STM32L031x4/6 Output voltage levels Unless otherwise specified, the parameters given in Table 54 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 20. All I/Os are CMOS and TTL compliant. Table 54. Output voltage characteristics Symbol Parameter VOL(1) Output low level voltage for an I/O pin VOH(3) Output high level voltage for an I/O pin Conditions Min Max CMOS port(2), IIO = +8 mA 2.7 V ≤ VDD ≤ 3.
STM32L031x4/6 Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 27 and Table 55, respectively. Unless otherwise specified, the parameters given in Table 55 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 20. Table 55.
Electrical characteristics STM32L031x4/6 Figure 27. I/O AC characteristics definition (;7(51$/ 287387 21 &/ WU ,2 RXW WI ,2 RXW 7 0D[LPXP IUHTXHQF\ LV DFKLHYHG LI WU WI 7 DQG LI WKH GXW\ F\FOH LV ZKHQ ORDGHG E\ &/ VSHFLILHG LQ WKH WDEOH ³ , 2 $& FKDUDFWHULVWLFV´ 6.3.14 DL G NRST pin characteristics The NRST pin input driver uses CMOS technology.
STM32L031x4/6 Electrical characteristics Figure 28. Recommended NRST pin protection 9'' ([WHUQDO UHVHW FLUFXLW 1567 538 ,QWHUQDO UHVHW )LOWHU ) 670 /[[ DL F 1. The reset network protects the device against parasitic resets. 2. The external capacitor must be placed as close as possible to the device. 3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 56. Otherwise the reset will not be taken into account by the device. 6.3.
Electrical characteristics STM32L031x4/6 Table 57. ADC characteristics (continued) Symbol tCAL(3) Parameter Calibration time Conditions fADC = 16 MHz tlatr(3) JitterADC ADC_DR register write latency Trigger conversion latency ADC jitter on trigger conversion tS(3) Sampling time tSTAB(3) Power-up time tConV(3) Total conversion time (including sampling time) Typ Max Unit 5.2 µs 83 1/fADC 1.5 ADC cycles + 2 fPCLK cycles - 1.5 ADC cycles + 3 fPCLK cycles - ADC clock = PCLK/2 - 4.
STM32L031x4/6 Electrical characteristics Table 58. RAIN max for fADC = 16 MHz(1) Ts (cycles) tS (µs) RAIN max for fast channels (kΩ) 1.5 0.09 3.5 RAIN max for standard channels (kΩ) VDD > 1.65 V VDD > 1.65 V and and TA > −10 °C TA > 25 °C VDD > 2.7 V VDD > 2.4 V VDD > 2.0 V VDD > 1.8 V VDD > 1.75 V 0.5 < 0.1 NA NA NA NA NA NA 0.22 1 0.2 < 0.1 NA NA NA NA NA 7.5 0.47 2.5 1.7 1.5 < 0.1 NA NA NA NA 12.5 0.78 4 3.2 3 1 NA NA NA NA 19.5 1.22 6.5 5.7 5.5 3.
Electrical characteristics STM32L031x4/6 Figure 29.
STM32L031x4/6 Electrical characteristics Table 61. Temperature sensor characteristics Symbol Parameter TL(1) VSENSE linearity with temperature Avg_Slope (1) Average slope (2) Min Typ Max Unit - ±1 ±2 °C 1.48 1.61 1.75 mV/°C 640 670 700 mV µA V130 Voltage at 130°C ±5°C IDDA(TEMP)(3) Current consumption - 3.4 6 tSTART(3) Startup time - - 10 TS_temp(4)(3) ADC sampling time when reading the temperature 10 - - µs 1. Guaranteed by characterization results. 2.
Electrical characteristics STM32L031x4/6 Table 63. Comparator 2 characteristics Symbol VDDA VIN Parameter Typ Max(1) Unit Conditions Min Analog supply voltage - 1.65 - 3.6 V Comparator 2 input voltage range - 0 - VDDA V Fast mode - 15 20 Slow mode - 20 25 tSTART Comparator startup time td slow Propagation delay(2) in slow mode 1.65 V ≤ VDDA ≤ 2.7 V - 1.8 3.5 2.7 V ≤ VDDA ≤ 3.6 V - 2.5 6 td fast Propagation delay(2) in fast mode 1.65 V ≤ VDDA ≤ 2.7 V - 0.8 2 2.
STM32L031x4/6 Electrical characteristics Table 64. TIMx(1) characteristics (continued) Symbol Parameter Conditions Min Max Unit - 1 65536 tTIMxCLK tCOUNTER 16-bit counter clock period when internal clock is selected (timer’s prescaler disabled) 2048 µs tMAX_COUNT Maximum possible count fTIMxCLK = 32 MHz 0.0312 - - 65536 × 65536 tTIMxCLK fTIMxCLK = 32 MHz - 134.2 s 1. TIMx is used as a general term to refer to the TIM2, TIM21, and TIM22 timers. 6.3.
Electrical characteristics STM32L031x4/6 3. Spikes with widths above tAF(max) are not filtered SPI characteristics Unless otherwise specified, the parameters given in the following tables are derived from tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 20. Refer to Section 6.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 66.
STM32L031x4/6 Electrical characteristics Table 67. SPI characteristics in voltage Range 2 (1) Symbol Parameter Conditions Min Typ Master mode fSCK 1/tc(SCK) SPI clock frequency Slave mode Transmitter 1.65
Electrical characteristics STM32L031x4/6 Table 68. SPI characteristics in voltage Range 3 (1) Symbol Parameter fSCK 1/tc(SCK) SPI clock frequency Duty(SCK) Duty cycle of SPI clock frequency tsu(NSS) Min Typ - - Slave mode 30 50 70 NSS setup time Slave mode, SPI presc = 2 4*Tpclk - - th(NSS) NSS hold time Slave mode, SPI presc = 2 2*Tpclk - - tw(SCKH) tw(SCKL) SCK high and low time Master mode Tpclk–2 Tpclk Tpclk+2 Master mode 28.
STM32L031x4/6 Electrical characteristics Figure 31. SPI timing diagram - slave mode and CPHA = 0 166 LQSXW WF 6&. 6&. LQSXW WVX 166 WK 166 WZ 6&.+ WU 6&. &3+$ &32/ &3+$ &32/ WD 62 WZ 6&./ WY 62 WK 62 )LUVW ELW 287 0,62 RXWSXW WI 6&. 1H[W ELWV 287 WGLV 62 /DVW ELW 287 WK 6, WVX 6, )LUVW ELW ,1 026, LQSXW 1H[W ELWV ,1 /DVW ELW ,1 06Y 9 Figure 32. SPI timing diagram - slave mode and CPHA = 1(1) 166 LQSXW 6&. LQSXW WF 6&. WVX 166 WZ 6&.+ WD 62 WZ 6&./ WI 6&.
Electrical characteristics STM32L031x4/6 Figure 33. SPI timing diagram - master mode(1) +LJK 166 LQSXW 6&. 2XWSXW &3+$ &32/ 6&. 2XWSXW WF 6&. &3+$ &32/ &3+$ &32/ &3+$ &32/ WVX 0, 0,62 ,13 87 WZ 6&.+ WZ 6&./ 06% ,1 WU 6&. WI 6&. %,7 ,1 /6% ,1 WK 0, 026, 287387 06% 287 % , 7 287 WY 02 /6% 287 WK 02 DL G 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. 96/126 Downloaded from Arrow.com.
STM32L031x4/6 7 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at www.st.com. ECOPACK® is an ST trademark. 7.1 LQFP48 package information Figure 34. LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM '!5'% 0,!.
Package information STM32L031x4/6 Table 69. LQFP48 - 48-pin low-profile quad flat package, 7 x 7 mm, package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.500 - - 0.
STM32L031x4/6 Package information Figure 35. LQFP48 recommended footprint AI D 1. Dimensions are expressed in millimeters. DS10668 Rev 6 99/126 120 Downloaded from Arrow.com.
Package information STM32L031x4/6 LQFP48 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 36. Example of LQFP48 marking (package top view) 3URGXFW LGHQWLILFDWLRQ 670 / & 7 'DWH FRGH < :: 5HYLVLRQ FRGH 3LQ LQGHQWLILHU 5 06Y 9 1.
STM32L031x4/6 7.2 Package information UFQFPN48 package information Figure 37. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline 3LQ LGHQWLILHU ODVHU PDUNLQJ DUHD ' $ ( ( 7 GGG $ 6HDWLQJ SODQH E H 'HWDLO < ' ([SRVHG SDG DUHD < ' / & [ SLQ FRUQHU ( 5 W\S 'HWDLO = = $ % B0(B9 1. Drawing is not to scale. 2. All leads/pads must also be soldered to the PCB to improve the lead/pad solder joint life. 3.
Package information STM32L031x4/6 Table 70. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 0.000 0.020 0.050 0.0000 0.0008 0.0020 D 6.900 7.000 7.100 0.2717 0.2756 0.2795 E 6.900 7.000 7.100 0.2717 0.2756 0.2795 D2 5.500 5.600 5.700 0.2165 0.2205 0.2244 E2 5.500 5.600 5.700 0.2165 0.2205 0.2244 L 0.300 0.
STM32L031x4/6 Package information UFQFPN48 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 39. Example of UFQFPN48 marking (package top view) 3URGXFW LGHQWLILFDWLRQ (6 / & 8 'DWH FRGH < :: 5HYLVLRQ FRGH 3LQ LQGHQWLILHU 5 06Y 9 1.
Package information 7.3 STM32L031x4/6 LQFP32 package information Figure 40. LQFP32, 7 x 7 mm, 32-pin low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM CCC '!5'% 0,!.% # + $ ! , $ , $ 0). )$%.4)&)#!4)/. 1. Drawing is not to scale. Downloaded from Arrow.com. % E 104/126 % % B DS10668 Rev 6 7@.
STM32L031x4/6 Package information Table 71. LQFP32, 7 x 7 mm, 32-pin low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.600 - - 0.
Package information STM32L031x4/6 LQFP32 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 42. Example of LQFP32 marking (package top view) 3URGXFW LGHQWLILFDWLRQ 670 / . 7 'DWH FRGH < :: 3LQ LQGHQWLILHU 5HYLVLRQ FRGH 5 06Y 9 1.
STM32L031x4/6 7.4 Package information UFQFPN32 package information Figure 43. UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline ' $ $ $ H GGG & & 6($7,1*3/$1( ' E H ( E ( ( / ' 3,1 ,GHQWLILHU / $ % B0(B9 1. Drawing is not to scale. 2. There is an exposed die pad on the underside of the UFQFPN package. It is recommended to connect and solder this backside pad to PCB ground. Table 72. UFQFPN32 - 32-pin, 5x5 mm, 0.
Package information STM32L031x4/6 Figure 44. UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package recommended footprint $ % B)3B9 1. Dimensions are expressed in millimeters. UFQFPN32 device marking The following figure gives an example of topside marking versus pin 1 position identifier location.
STM32L031x4/6 7.5 Package information UFQFPN28 package information Figure 46. UFQPN28 - 28-lead, 4 x 4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline 'HWDLO < ' ( ' ' ( 'HWDLO = ! " ?-%?6 1. Drawing is not to scale. Table 73. UFQPN28 - 28-lead, 4 x 4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data(1) millimeters inches Symbol Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 - 0.000 0.050 - 0.0000 0.
Package information STM32L031x4/6 Table 73. UFQPN28 - 28-lead, 4 x 4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data(1) (continued) millimeters inches Symbol Min Typ Max Min Typ Max b 0.200 0.250 0.300 0.0079 0.0098 0.0118 e - 0.500 - - 0.0197 - 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 47. UFQFPN28 recommended footprint 1. Dimensions are expressed in millimeters.
STM32L031x4/6 Package information UFQFPN28 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 48. Example of UFQFPN28 marking (package top view) 3URGXFW LGHQWLILFDWLRQ / 8 5HYLVLRQ FRGH < 'DWH FRGH 3LQ LQGHQWLILHU < :: 06Y 9 1.
Package information 7.6 STM32L031x4/6 WLCSP25 package information Figure 49. WLCSP25 - 2.097 x 2.493 mm, 0.400 mm pitch wafer level chip scale package outline H EEE = $ EDOO ORFDWLRQ ) H * $ 'HWDLO $ H H ( $ $ $ %XPS VLGH 6LGH YLHZ %XPS $ RULHQWDWLRQ UHIHUHQFH HHH = DDD E EDOOV FFF = ; < GGG = [ :DIHU EDFN VLGH $ E = 6HDWLQJ SODQH 'HWDLO $ URWDWHG :/&63 B$ B0(B9 Table 74. WLCSP25 - 2.097 x 2.493 mm, 0.
STM32L031x4/6 Package information Table 74. WLCSP25 - 2.097 x 2.493 mm, 0.400 mm pitch wafer level chip scale mechanical data (continued) Inches(1) Milimeters Symbol Min Typ Max Min Typ Max aaa - - 0.100 - - 0.0039 bbb - - 0.100 - - 0.0039 ccc - - 0.100 - - 0.0039 ddd - - 0.050 - - 0.0020 eee - - 0.050 - - 0.0020 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Back side coating. 3.
Package information STM32L031x4/6 WLCSP25 device marking The following figure gives an example of topside marking versus ball A1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 51. Example of WLCSP25 marking (package top view) %DOO $ LGHQWLILHU 3URGXFW LGHQWLILFDWLRQ / 5HYLVLRQ FRGH 'DWH FRGH
STM32L031x4/6 7.7 Package information TSSOP20 package information Figure 52.TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package outline ' F ( ( 6($7,1* 3/$1( & PP *$8*( 3/$1( 3,1 ,'(17,),&$7,21 N DDD & $ $ $ E / / H <$B0(B9 1. Drawing is not to scale. Table 76. TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package mechanical data inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. A - - 1.
Package information STM32L031x4/6 Table 76. TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package mechanical data (continued) inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. k 0° - 8° 0° - 8° aaa - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 3.
STM32L031x4/6 Package information TSSOP20 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 54. Example of TSSOP20 marking (package top view) 3URGXFW LGHQWLILFDWLRQ / ) 3 3LQ LQGHQWLILHU 'DWH FRGH < :: 5HYLVLRQ FRGH 5 06Y 9 1.
Package information 7.8 STM32L031x4/6 Thermal characteristics The maximum chip-junction temperature, TJ max, in degrees Celsius, may be calculated using the following equation: TJ max = TA max + (PD max × ΘJA) Where: • TA max is the maximum ambient temperature in ° C, • ΘJA is the package junction-to-ambient thermal resistance, in ° C/W, • PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/Omax), • PINT max is the product of IDD and VDD, expressed in Watts.
STM32L031x4/6 Package information Figure 55. Thermal resistance ϰϬϬϬ ϯϱϬϬ ϯϬϬϬ 3' P: >Y&Wϰϴ >Y&WϯϮ ϮϱϬϬ hY&Eϰϴ ϮϬϬϬ hY&EϯϮ h&Y&EϮϴ ϭϱϬϬ t> ^WϮϱ ϭϬϬϬ d^^KWϮϬ ϱϬϬ Ϭ ϭϮϱ ϭϬϬ ϳϱ ϱϬ Ϯϱ Ϭ 7HPSHUDWXUH & 06Y 9 1. The above curves are valid for range 3. For range 7, the curves are shifted by 20 °C to the right. 7.8.1 Reference document JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air). Available from http://www.jedec.org.
Ordering information 8 STM32L031x4/6 Ordering information Table 78.
STM32L031x4/6 9 Revision history Revision history Table 79. Document revision history Date Revision 18-Sep-2015 1 Initial release. 2 Datasheet status changed to production data.Updated power consumption in run mode on cover page. Updated Table 5: Functionalities depending on the working mode (from Run/active down to standby). Modified Figure 7: STM32L031x4/6 UFQFPN28 pinout and Table 15: Pin definitions. Updated power dissipation (PD) in Table 20: General operating conditions.
Revision history STM32L031x4/6 Table 79. Document revision history Date 01-Feb-2016 122/126 Downloaded from Arrow.com. Revision Changes 3 Updated number of SPI interfaces on cover page and in Table 2: Ultra-low-power STM32L031x4/x6 device features and peripheral counts. Updated number of GPIOs for devices in UFQFPN28 in Table 2: Ultra-low-power STM32L031x4/x6 device features and peripheral counts. Updated Section 3.4.4: Boot modes. Updated Section 3.16.
STM32L031x4/6 Revision history Table 79. Document revision history Date 05-Apr-2016 Revision Changes 4 Features: – Change minimum comparator supply voltage to 1.65 V. – Updated current consumptions in Standby, Stop and Stop with RTC ON modes. Updated number of GPIOs for STM32L031GxUxS in Table 2: Ultra-low-power STM32L031x4/x6 device features and peripheral counts.
Revision history STM32L031x4/6 Table 79. Document revision history Date Revision Changes Added UFQFPN48 package. Removed column "I/O operation" from Table 3: Functionalities depending on the operating power supply range and added note related to GPIO speed. In Section 4: Pin descriptions, changed USARTx_RTS and LPUARTx_RTS into USARTx_RTS_DE and LPUARTx_RTS_DE, respectively. In Section 5: Memory mapping, replaced memory mapping schematic by reference to the reference manual.
STM32L031x4/6 Revision history Table 79. Document revision history Date 01-Mar-2018 Revision Changes 6 Added Arm logo in Section 1: Introduction and removed USB and Cortex logo from Section 2: Description. Changed RTS into RTS/DE in Figure 1: STM32L031x4/6 block diagram. Changed USART2_RTS and USART2_RTS_DE into USART2_RTS/USART2_DE, and LPUART1_RTS and LPUART1_RTS_DE into LPUART1_RTS/LPUART1_DE in Table 15: Pin definitions and Table 16: Alternate functions.
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