Datasheet

DocID027973 Rev 5 19/119
STM32L011x3/4 Functional overview
32
3.3 Arm
®
Cortex
®
-M0+ core
The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a
broad range of embedded applications. It offers significant benefits to developers, including:
• a simple architecture that is easy to learn and program
• ultra-low power, energy-efficient operation
• excellent code density
• deterministic, high-performance interrupt handling
• upward compatibility with Cortex-M processor family
• platform security robustness.
The Cortex-M0+ processor is built on a highly area and power optimized 32-bit processor
core, with a 2-stage pipeline von Neumann architecture. The processor delivers exceptional
energy efficiency through a small but powerful instruction set and extensively optimized
design, providing high-end processing hardware including a single-cycle multiplier.
The Cortex-M0+ processor provides the exceptional performance expected of a modern 32-
bit architecture, with a higher code density than other 8-bit and 16-bit microcontrollers.
Owing to its embedded Arm core, the STM32L011x3/4 are compatible with all Arm tools and
software.
Table 6. STM32L011x3/4 peripherals interconnect matrix
Interconnect
source
Interconnect
destination
Interconnect action Run Sleep
Low-
power
run
Low-
power
sleep
Stop
COMPx
TIM2,TIM21
Timer input channel,
trigger from analog
signals comparison
YY Y Y -
LPTIM1
Timer input channel,
trigger from analog
signals comparison
YY Y Y Y
TIMx TIMx
Timer triggered by other
timer
YY Y Y -
RTC
TIM21
Timer triggered by Auto
wake-up
YY Y Y -
LPTIM1
Timer triggered by RTC
event
YY Y Y Y
All clock
source
TIMx
Clock source used as
input channel for RC
measurement and
trimming
YY Y Y -
GPIO
TIMx
Timer input channel and
trigger
YY Y Y -
LPTIM1
Timer input channel and
trigger
YY Y Y Y
ADC Conversion trigger Y Y Y Y -
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