Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 8KB TSSOP

This is information on a product in full production.

September 2017 DocID027973 Rev 5 1/119

STM32L011x3 STM32L011x4

Access line ultra-low-power 32-bit MCU Arm

-based

Cortex

-M0+, up to 16KB Flash, 2KB SRAM, 512B EEPROM, ADC

Datasheet - production data

Features

•

Ultra-low-power platform

– 1.65 V to 3.6 V power supply

– -40 to 125 °C temperature range

– 0.23 µA Standby mode (2 wakeup pins)

– 0.29 µA Stop mode (16 wakeup lines)

– 0.54 µA Stop mode + RTC + 2 KB RAM

retention

– Down to 76 µA/MHz in Run mode

– 5 µs wakeup time (from Flash memory)

– 41 µA 12-bit ADC conversion at 10 ksps

•

Core: Arm

32-bit Cortex

-M0+

– From 32 kHz to 32 MHz max.

– 0.95 DMIPS/MHz

•

Reset and supply management

– Ultra-safe, low-power BOR (brownout reset)

with 5 selectable thresholds

– Ultralow power POR/PDR

– Programmable voltage detector (PVD)

•

Clock sources

– 0 to 32 MHz external clock

– 32 kHz oscillator for RTC with calibration

– High speed internal 16 MHz factory-trimmed RC

(+/- 1%)

– Internal low-power 37 kHz RC

– Internal multispeed low-power 65 kHz to

4.2 MHz RC

– PLL for CPU clock

•

Pre-programmed bootloader

– USART, SPI supported

•

Development support

– Serial wire debug supported

•

Up to 28 fast I/Os (23 I/Os 5V tolerant)

•

Memories

–

Up to

16 KB Flash memory with ECC

– 2 KB RAM

– 512 B of data EEPROM with ECC

– 20-byte backup register

– Sector protection against R/W operation

–

•

Rich Analog peripherals

– 12-bit ADC 1.14 Msps up to 10 channels (down

to 1.65 V)

– 2x ultra-low-power comparators (window mode

and wake up capability, down to 1.65 V)

•

5-channel DMA controller, supporting ADC, SPI,

I2C, USART, Timers

•

4x peripherals communication interface

•

1x USART (ISO 7816, IrDA), 1x UART (low power)

•

1x SPI 16 Mbits/s

•

1x I2C (SMBus/PMBus)

•

7x timers: 1x 16-bit with up to 4 channels, 1x 16-bit

with up to 2 channels, 1x 16-bit ultra-low-power

timer, 1x SysTick, 1x RTC and 2x watchdogs

(independent/window)

•

CRC calculation unit, 96-bit unique ID

•

All packages are ECOPACK

Table 1. Device summary

Reference Part number

STM32L011x3

STM32L011G3, STM32L011K3,

STM32L011E3, STM32L011F3,

STM32L011D3

STM32L011x4

STM32L011G4, STM32L011K4,

STM32L011E4, STM32L011F4,

STM32L011D4

UFQFPN20 3x3 mm

UFQFPN28 4x4 mm

UFQFPN32 5x5 mm

LQFP32

7x7 mm

WLCSP25

2.133x2.070 mm

TSSOP14/20

169 mils

www.st.com

Downloaded from Arrow.com.

Summary of content (119 pages)

PAGE 1
STM32L011x3 STM32L011x4 Access line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0+, up to 16KB Flash, 2KB SRAM, 512B EEPROM, ADC Datasheet - production data Features • • • • • • • • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.23 µA Standby mode (2 wakeup pins) – 0.29 µA Stop mode (16 wakeup lines) – 0.
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Contents STM32L011x3/4 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.2 Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Functional overview . . . . .
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STM32L011x3/4 Contents 3.15.1 I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.15.2 Universal synchronous/asynchronous receiver transmitter (USART) . . 30 3.15.3 Low-power universal asynchronous receiver transmitter (LPUART) . . . 31 3.15.4 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.16 Cyclic redundancy check (CRC) calculation unit . . . . . . . . . . . . . . . . . . . 31 3.
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Contents 7 STM32L011x3/4 6.3.16 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 6.3.17 Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.3.18 Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.3.19 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Package information . . . . . . . . . . . . . . .
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STM32L011x3/4 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Device summary . . . . .
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List of tables Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. 6/119 Downloaded from Arrow.com. STM32L011x3/4 EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32L011x3/4 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. STM32L011x3/4 block diagram . .
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List of figures Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. Figure 50. Figure 51. Figure 52. 8/119 Downloaded from Arrow.com. STM32L011x3/4 UFQFPN28 - 28-lead, 4x4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 UFQFPN28 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32L011x3/4 1 Introduction Introduction The ultra-low-power STM32L011x3/4 family includes devices in 7 different package types from 14 to 32 pins. The description below gives an overview of the complete range of peripherals proposed in this family.
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Description 2 STM32L011x3/4 Description The access line ultra-low-power STM32L011x3/4 family incorporates the high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at a 32 MHz frequency, high-speed embedded memories (up to 16 Kbytes of Flash program memory, 512 bytes of data EEPROM and 2 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals. The STM32L011x3/4 devices provide high power efficiency for a wide range of performance.
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STM32L011x3/4 2.1 Description Device overview Table 2.
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Description STM32L011x3/4 Figure 1. STM32L011x3/4 block diagram 7HPS VHQVRU 6:' 6:' )/$6+ ((3520 %227 &257(; 0 &38 )PD[ 0+] $'& $,1[ 63, 0,62 026, 6&. 166 5$0 '%* '0$ 19,& (;7, $ 3 % 7,0 FK %5,'*( &203 ,13 ,10 287 &203 ,13 ,10 287 /37,0 ,1 ,1 (75 287 &5& %5,'*( *3,2 3257 $ 3%> @ *3,2 3257 % 3&> @ *3,2 3257 & &.B,1 +6( $+% )PD[ 0+] 3$> @ ::'* , & $ 3 % 6&/ 6'$ 60%$ 86$57 5; 7; 576 &76 &.
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STM32L011x3/4 2.2 Description Ultra-low-power device continuum The ultra-low-power family offers a large choice of core and features, from 8-bit proprietary core up to Arm® Cortex®-M4, including Arm® Cortex®-M3 and Arm® Cortex®-M0+. The STM32Lx series are the best choice to answer your needs in terms of ultra-low-power features. The STM32 Ultra-low-power series are the best solution for applications such as gas/water meter, keyboard/mouse or fitness and healthcare application.
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Functional overview STM32L011x3/4 3 Functional overview 3.1 Low-power modes The ultra-low-power STM32L011x3/4 supports dynamic voltage scaling to optimize its power consumption in Run mode. The voltage from the internal low-drop regulator that supplies the logic can be adjusted according to the system’s maximum operating frequency and the external voltage supply. There are three power consumption ranges: • Range 1 (VDD range limited to 1.71-3.
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STM32L011x3/4 Functional overview (if internal reference voltage is on), it can be the RTC alarm/tamper/timestamp/wakeup events, the USART/I2C/LPUART/LPTIM wakeup events. • Stop mode without RTC The Stop mode achieves the lowest power consumption while retaining the RAM and register contents. All clocks are stopped, the PLL, MSI RC, HSI and LSI RC, HSE and LSE crystal oscillator are disabled.
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Functional overview STM32L011x3/4 Table 3. Functionalities depending on the operating power supply range Functionalities depending on the operating power supply range Operating power supply range ADC operation Dynamic voltage scaling range VDD = 1.65 to 1.71 V ADC only, conversion time up to 570 ksps Range 2 or range 3 VDD = 1.71 to 1.8 V(1) ADC only, conversion time up to 1.14 Msps Range 1, range 2 or range 3 VDD = 1.8 to 2.0 V(1) Conversion time up to 1.
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STM32L011x3/4 Functional overview Table 5.
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Functional overview STM32L011x3/4 Table 5.
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STM32L011x3/4 Functional overview Table 6.
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Functional overview STM32L011x3/4 Nested vectored interrupt controller (NVIC) The ultra-low-power STM32L011x3/4 embed a nested vectored interrupt controller able to handle up to 32 maskable interrupt channels and 4 priority levels. The Cortex-M0+ processor closely integrates a configurable Nested Vectored Interrupt Controller (NVIC), to deliver industry-leading interrupt performance.
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STM32L011x3/4 Functional overview Five BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To reduce the power consumption in Stop mode, it is possible to automatically switch off the internal reference voltage (VREFINT) in Stop mode. The device remains in reset mode when VDD is below a specified threshold, VPOR/PDR or VBOR, without the need for any external reset circuit. Note: The start-up time at power-on is typically 3.
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Functional overview 3.5 STM32L011x3/4 Clock management The clock controller distributes the clocks coming from different oscillators to the core and the peripherals. It also manages clock gating for low-power modes and ensures clock robustness. It features: • Clock prescaler To get the best trade-off between speed and current consumption, the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.
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STM32L011x3/4 Functional overview Figure 2. Clock tree #9 /6, 5& (QDEOH :DWFKGRJ :DWFKGRJ /6 /6, WHPSR /HJHQG +6( +LJK VSHHG H[WHUQDO FORFN VLJQDO +6, +LJK VSHHG LQWHUQDO FORFN VLJQDO /6, /RZ VSHHG LQWHUQDO FORFN VLJQDO /6( /RZ VSHHG H[WHUQDO FORFN VLJQDO 06, 0XOWLVSHHG LQWHUQDO FORFN VLJQDO 57&6(/ 57& HQDEOH /6( 26& 57& /6( WHPSR /68 /6' /6' #9 0+] #9 06, 5& /HYHO VKLIWHUV #9 /6, /6( 06, 0&26(/ $'& HQDEOH $'&&/.
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Functional overview 3.6 STM32L011x3/4 Low-power real-time clock and backup registers The real time clock (RTC) and the 5 backup registers are supplied in all modes including standby mode. The backup registers are five 32-bit registers used to store 20 bytes of user application data. They are not reset by a system reset, or when the device wakes up from Standby mode. The RTC is an independent BCD timer/counter.
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STM32L011x3/4 Functional overview (rising edge, falling edge, both) and can be masked independently. A pending register maintains the status of the interrupt requests. The EXTI can detect an external line with a pulse width shorter than the Internal APB2 clock period. Up to 38 GPIOs can be connected to the 16 configurable interrupt/event lines. The 10 other lines are connected to PVD, RTC, USART, I2C, LPUART, LPTIM or comparator events. 3.
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Functional overview 3.10 STM32L011x3/4 Analog-to-digital converter (ADC) A native 12-bit, extended to 16-bit through hardware oversampling, analog-to-digital converter is embedded into STM32L011x3/4 devices. It has up to 10 external channels and 2 internal channels (temperature sensor, voltage reference). Three channels, PA0, PA4 and PA5, are fast channels, while the others are standard channels. The ADC performs conversions in single-shot or scan mode.
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STM32L011x3/4 3.12 Functional overview Ultra-low-power comparators and reference voltage The STM32L011x3/4 embed two comparators sharing the same current bias and reference voltage. The reference voltage can be internal or external (coming from an I/O). • One comparator with ultra low consumption • One comparator with rail-to-rail inputs, fast or slow mode.
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Functional overview 3.14.1 STM32L011x3/4 General-purpose timers (TIM2, TIM21) There are three synchronizable general-purpose timers embedded in the STM32L011x3/4 devices (see Table 7 for differences). TIM2 TIM2 is based on 16-bit auto-reload up/down counter. It includes a 16-bit prescaler. It features four independent channels each for input capture/output compare, PWM or onepulse mode output.
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STM32L011x3/4 3.14.4 Functional overview Independent watchdog (IWDG) The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is clocked from an independent 37 kHz internal RC and, as it operates independently of the main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog to reset the device when a problem occurs, or as a free-running timer for application timeout management. It is hardware- or software-configurable through the option bytes.
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Functional overview STM32L011x3/4 Table 9. STM32L011x3/4 I2C implementation I2C features(1) I2C1 7-bit addressing mode X 10-bit addressing mode X Standard mode (up to 100 kbit/s) X Fast mode (up to 400 kbit/s) X X(2) Fast Mode Plus with 20 mA output drive I/Os (up to 1 Mbit/s) Independent clock X SMBus X Wakeup from STOP X 1. X = supported. 2. See Table 13: Pin definitions on page 37 for the list of I/Os that feature Fast Mode Plus capability 3.15.
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STM32L011x3/4 3.15.3 Functional overview Low-power universal asynchronous receiver transmitter (LPUART) The devices embed one Low-power UART. The LPUART supports asynchronous serial communication with minimum power consumption. It supports half duplex single wire communication and modem operations (CTS/RTS). It allows multiprocessor communication. The LPUART has a clock domain independent from the CPU clock, and can wake up the system from Stop mode, using baudrates up to 46 Kbaud.
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Functional overview 3.17 STM32L011x3/4 Serial wire debug port (SW-DP) An Arm SW-DP interface is provided to allow a serial wire debugging tool to be connected to the MCU. 32/119 Downloaded from Arrow.com.
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STM32L011x3/4 4 Pin descriptions Pin descriptions 3$ 3% 3% 3% 3% 3% 966 3% %227 Figure 3. STM32L011x3/4 LQFP32 pinout 9'' 3$ 3& 26& B,1 3$ 3& 26& B287 3$ 1567 3$ 3$ 3$ &.B,1 3$ 3$ 3$ 3$ 9'' 966 3% 3% 3$ 3$ 3$ 3$ 3$ 9''$ /4)3 06Y 9 1. The above figure shows the package top view.
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Pin descriptions STM32L011x3/4 Figure 5. STM32L011x3/4 WLCSP25 pinout $ 3$ 3$ 3% 3% 3% %227 % 3$ 3% 3$ 3$ 3& 26& B ,1 & 3$ 3$ 3$ 9''$ 3& 26& B287 ' 9'' 3% 3$ 3$ 1567 ( 966 3% 3$ 3$ &.B,1 3$ 06Y 9 1. The above figure shows the package top view. 3$ 3$ 3$ 1567 3$ 9''$ 9'' 966 3% 3$ 3$ 3$ 3$ &.
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STM32L011x3/4 Pin descriptions 3& 26& B,1 3$ 3$ 3% 3% 3% %227 Figure 7. STM32L011x3/4 UFQFPN20 pinout 3$ 9'' 9''$ 966 3$ &.B,1 3% 3$ 1567 3$ 3$ 3$ 3$ 3$ 3& 26& B287 06Y 9 1. The above figure shows the package top view. Figure 8. STM32L011x3/4 TSSOP20 pinout 3% %227 3& 26& B,1 3& 26& B287 3$ 1567 3$ 3$ 3$ 9''$ 9'' 3$ &.
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Pin descriptions STM32L011x3/4 Figure 9. STM32L011x3/4 TSSOP14 pinout 3% %227 3& 26& B,1 3& 26& B287 3$ 3$ 3$ 1567 3$ 3$ &.B,1 3$ 3$ 9'' 966 3$ 06Y 9 1. The above figure shows the package top view. Table 12.
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STM32L011x3/4 Pin descriptions Table 13.
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Pin descriptions STM32L011x3/4 Table 13.
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STM32L011x3/4 Pin descriptions Table 13.
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Pin descriptions STM32L011x3/4 Table 13.
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Downloaded from Arrow.com.
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/119 Downloaded from Arrow.com.
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STM32L011x3/4 5 Memory mapping Memory mapping Refer to the product line reference manual for details on the memory mapping as well as the boundary addresses for all peripherals. DocID027973 Rev 5 43/119 43 Downloaded from Arrow.com.
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Electrical characteristics STM32L011x3/4 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 6.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
PAGE 45
STM32L011x3/4 6.1.6 Electrical characteristics Power supply scheme Figure 12. Power supply scheme 287 *3 , 2V ,1 /HYHO VKLIWHU 6WDQGE\ SRZHU FLUFXLWU\ 26& 57& :DNH XS ORJLF 57& EDFNXS UHJLVWHUV ,2 /RJLF .HUQHO ORJLF &38 'LJLWDO 0HPRULHV 9'' 9'' 5HJXODWRU 1 î Q) î ) 966 9''$ 9''$ Q) ) $'& $QDORJ 5& 3// &203 « 966$ 06Y 9 1. On TSSOP14 package, VDDA is internally connected to VDD. 2. VSSA is internally connected to VSS on all packages. 6.1.
PAGE 46
Electrical characteristics 6.2 STM32L011x3/4 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 15: Voltage characteristics, Table 16: Current characteristics, and Table 17: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
PAGE 47
STM32L011x3/4 Electrical characteristics Table 16. Current characteristics Symbol Ratings Max.
PAGE 48
Electrical characteristics STM32L011x3/4 6.3 Operating conditions 6.3.1 General operating conditions Table 18. General operating conditions Symbol Parameter Conditions Min Max fHCLK Internal AHB clock frequency - 0 32 fPCLK1 Internal APB1 clock frequency - 0 32 fPCLK2 Internal APB2 clock frequency - 0 32 BOR detector disabled 1.65 3.6 BOR detector enabled, at power on 1.8 3.6 BOR detector disabled, after power on 1.65 3.6 Must be the same voltage as VDD(1) 1.65 3.6 2.
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STM32L011x3/4 Electrical characteristics Table 18.
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Electrical characteristics STM32L011x3/4 Table 19. Embedded reset and power control block characteristics (continued) Symbol Parameter Conditions VBOR3 Brown-out reset threshold 3 VBOR4 Brown-out reset threshold 4 VPVD0 Programmable voltage detector threshold 0 VPVD1 PVD threshold 1 VPVD2 PVD threshold 2 VPVD3 PVD threshold 3 VPVD4 PVD threshold 4 VPVD5 PVD threshold 5 VPVD6 PVD threshold 6 Vhyst Hysteresis voltage Min Typ Max Falling edge 2.45 2.55 2.6 Rising edge 2.54 2.
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STM32L011x3/4 6.3.3 Electrical characteristics Embedded internal reference voltage The parameters given in Table 21 are based on characterization results, unless otherwise specified. Table 20. Embedded internal reference voltage calibration values Calibration value name Description Memory address Raw data acquired at temperature of 25°C VDDA= 3 V VREFINT_CAL 0x1FF8 0078 - 0x1FF8 0079 Table 21.
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Electrical characteristics STM32L011x3/4 4. Guaranteed by design, not tested in production. 5. Shortest sampling time can be determined in the application by multiple iterations. 6. To guarantee less than 1% VREF_OUT deviation. 6.3.
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STM32L011x3/4 Electrical characteristics Table 22. Current consumption in Run mode, code with data processing running from Flash Symbol Parameter fHCLK Typ Max(1) 1 MHz 140 180 2 MHz 245 290 4 MHz 460 540 4 MHz 0.56 0.65 8 MHz 1.1 1.3 16 MHz 2.1 2.4 8 MHz 1.3 1.6 16 MHz 2.6 3 32 MHz 5.3 6.5 65 kHz 34.5 54 524 kHz 86 120 4.2 MHz 505 560 Range 2, VCORE=1.5 V, VOS[1:0]=10, 16 MHz 2.2 2.6 Range 1, VCORE=1.8 V, VOS[1:0]=01 32 MHz Conditions Range 3, VCORE=1.
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Electrical characteristics STM32L011x3/4 Figure 14. IDD vs VDD, at TA= 25 °C, Run mode, code running from Flash memory, Range 2, 16 MHz HSE, 1WS / ;ŵ Ϳ Ϯ͘ϱ Ϯ ϭ͘ϱ ϭ Ϭ͘ϱ Ϭ s ;sͿ ϭ͘ϲ ϭ͘ϴ Ϯ Ϯ͘Ϯ Ϯ͘ϰ Ϯ͘ϲ Ϯ͘ϴ ϯ ϯ͘Ϯ ϯ͘ϰ ϯ͘ϲ ŚƌǇƐƚŽŶĞ Ϯ͘ϭ͕ ϭ t^͕ d с Ϯϱ Σ 06Y 9 Figure 15.
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STM32L011x3/4 Electrical characteristics Table 24. Current consumption in Run mode, code with data processing running from RAM Symbol Parameter fHCLK Typ Max(1) 1 MHz 115 140 2 MHz 205 240 4 MHz 385 420 4 MHz 0.48 0.55 8 MHz 0.935 1.1 16 MHz 1.8 2 8 MHz 1.1 1.4 16 MHz 2.1 2.5 32 MHz 4.5 4.9 65 kHz 22 38 524 kHz 67 91 4.2 MHz 415 450 Range 2, VCORE=1.5 V, VOS[1:0]=10 16 MHz 1.95 2.2 Range 1, VCORE=1.8 V, VOS[1:0]=01 32 MHz Conditions Range 3, VCORE=1.
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Electrical characteristics STM32L011x3/4 Table 26. Current consumption in Sleep mode Symbol Parameter Conditions Range 3, VCORE=1.2 V, VOS[1:0]=11 fHSE = fHCLK up to 16 MHz included, fHSE = fHCLK/2 above 16 MHz (PLL ON)(2) Range 2, VCORE=1.5 V, VOS[1:0]=10 Range 1, VCORE=1.8 V, VOS[1:0]=01 Supply current in Sleep mode, Flash OFF MSI clock Range 3, VCORE=1.2 V, VOS[1:0]=11 Range 2, VCORE=1.5 V, HSI16 clock source VOS[1:0]=10 (16 MHz) Range 1, VCORE=1.8 V, VOS[1:0]=01 IDD (Sleep) Range 3, VCORE=1.
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STM32L011x3/4 Electrical characteristics Table 27. Current consumption in Low-power Run mode Symbol Parameter Typ Max(1) TA = -40 °C to 25 °C 5.7 8.1 TA = 85 °C 6.5 9 TA = 105 °C 8 13 TA = 125 °C 11.5 22 TA =-40 °C to 25 °C 8.7 11 TA = 85 °C 9.5 12 TA = 105 °C 11 15 TA = 125 °C 15 24 TA = -40 °C to 25 °C 17 19 TA = 55 °C 17 19.5 TA = 85 °C 17.5 20 TA = 105 °C 19 22 TA = 125 °C 22.
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Electrical characteristics STM32L011x3/4 Figure 16. IDD vs VDD, at TA= -40/25/55/ 85/105/125 °C, Low-power run mode, code running from RAM, Range 3, MSI (Range 0) at 64 KHz, 0 WS 06Y 9 Table 28. Current consumption in Low-power Sleep mode Symbol Parameter MSI clock, 65 kHz fHCLK = 32 kHz Flash OFF MSI clock, 65 kHz fHCLK = 32 kHz Flash ON IDD (LP Sleep) Supply All peripherals current in OFF, VDD from Low-power 1.65 V to 3.6 V sleep mode Typ Max(1) TA = -40 °C to 25 °C 2.
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STM32L011x3/4 Electrical characteristics Table 29. Typical and maximum current consumptions in Stop mode Symbol Parameter Conditions IDD (Stop) Supply current in Stop mode Typ Max(1) Unit TA = -40°C to 25°C 0.34 0.99 TA = 55°C 0.43 1.9 TA= 85°C 0.94 4.2 TA = 105°C 2.0 9 TA = 125°C 4.9 19 µA 1. Guaranteed by characterization results at 125 °C, not tested in production, unless otherwise specified. Figure 17.
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Electrical characteristics STM32L011x3/4 Table 30. Typical and maximum current consumptions in Standby mode Symbol Parameter Typ Max(1) TA = -40 °C to 25 °C 0.8 1.6 TA = 55 °C 0.9 1.8 TA= 85 °C 1 2 TA = 105 °C 1.25 3 TA = 125 °C 2 7 TA = -40 °C to 25 °C 0.23 0.6 TA = 55 °C 0.25 0.7 TA = 85 °C 0.36 1 TA = 105 °C 0.62 1.7 TA = 125 °C 1.
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STM32L011x3/4 Electrical characteristics Table 32. Peripheral current consumption in run or Sleep mode(1) Typical consumption, VDD = 3.0 V, TA = 25 °C Peripheral Range 1, Range 2, Range 3, VCORE=1.8 V VCORE=1.5 V VCORE=1.2 V VOS[1:0] = 01 VOS[1:0] = 10 VOS[1:0] = 11 Low-power sleep and run WWDG 2.5 2 1.6 2 LPUART1 8.3 7.2 5.4 7.2 I2C1 11 8.2 6.8 8.9 LPTIM1 14 11 8.7 11 TIM2 10.5 8.5 6.4 8.5 USART2 8.5 6.8 5.4 7.1 ADC1(2) 5.0 3.9 3.3 4 SPI1 4.5 3.5 2.9 3.
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Electrical characteristics STM32L011x3/4 Table 33. Peripheral current consumption in Stop and Standby mode Symbol Typical consumption, TA = 25 °C Peripheral VDD=1.8 V VDD=3.0 V IDD(PVD / BOR) - 0.6 1 IREFINT - 1.25 1.3 - LSE Low drive 0.11 0.16 - LPTIM1, Input 100 Hz 0.01 0.02 Unit µA 6.3.5 - LPTIM1, Input 1 MHz 8 9 - LPUART1 0.025 0.027 - RTC 0.1 0.
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STM32L011x3/4 Electrical characteristics Table 34. Low-power mode wakeup timings (continued) Symbol Parameter Conditions Typ Max fHCLK = fMSI = 4.2 MHz 5.1 8 fHCLK = fHSI = 16 MHz 5.1 7 fHCLK = fHSI/4 = 4 MHz 8.1 11 fHCLK = fMSI = 4.2 MHz Voltage range 1 5 8 fHCLK = fMSI = 4.2 MHz Voltage range 2 5 8 fHCLK = fMSI = 4.2 MHz Voltage range 3 5 8 fHCLK = fMSI = 2.1 MHz 7.4 13 fHCLK = fMSI = 1.
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Electrical characteristics 6.3.6 STM32L011x3/4 External clock source characteristics High-speed external user clock generated from an external source In bypass mode the input pin is a standard GPIO.The external clock signal has to respect the I/O characteristics in Section 6.3.12. However, the recommended clock input waveform is shown in Figure 19. Table 35.
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STM32L011x3/4 Electrical characteristics Low-speed external user clock generated from an external source The characteristics given in the following table result from tests performed using a lowspeed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 18. Table 36.
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Electrical characteristics STM32L011x3/4 time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 37. LSE oscillator characteristics(1) Symbol fLSE Gm Conditions(2) Min(2) Typ Max Unit - 32.768 - kHz LSEDRV[1:0]=00 lower driving capability - - 0.5 LSEDRV[1:0]= 01 medium low driving capability - - 0.75 LSEDRV[1:0] = 10 medium high driving capability - - 1.
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STM32L011x3/4 6.3.7 Electrical characteristics Internal clock source characteristics The parameters given in Table 38 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 18. High-speed internal 16 MHz (HSI16) RC oscillator Table 38. 16 MHz HSI16 oscillator characteristics Symbol fHSI16 TRIM (1)(2) ACCHSI16 (2) Parameter Conditions Min Typ Max Unit Frequency VDD = 3.
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Electrical characteristics STM32L011x3/4 Low-speed internal (LSI) RC oscillator Table 39. LSI oscillator characteristics Symbol Parameter Min Typ Max Unit fLSI(1) LSI frequency 26 38 56 kHz DLSI(2) LSI oscillator frequency drift 0°C ≤ TA ≤ 85°C -10 - 4 % LSI oscillator startup time - - 200 µs LSI oscillator power consumption - 400 510 nA tsu(LSI)(3) IDD(LSI) (3) 1. Guaranteed by test in production. 2.
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STM32L011x3/4 Electrical characteristics Table 40. MSI oscillator characteristics (continued) Symbol tSU(MSI) tSTAB(MSI)(2) fOVER(MSI) Parameter MSI oscillator startup time MSI oscillator stabilization time MSI oscillator frequency overshoot Condition Typ Max Unit MSI range 0 30 - MSI range 1 20 - MSI range 2 15 - MSI range 3 10 - MSI range 4 6 - MSI range 5 5 - MSI range 6, Voltage range 1 and 2 3.
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Electrical characteristics STM32L011x3/4 Table 41. PLL characteristics (continued) Value Symbol Parameter Min Typ Max(1) Unit fPLL_OUT PLL output clock 2 - 32 MHz tLOCK PLL input = 16 MHz PLL VCO = 96 MHz - 115 160 µs Jitter Cycle-to-cycle jitter - ± 600 ps IDDA(PLL) Current consumption on VDDA - 220 450 IDD(PLL) Current consumption on VDD - 120 150 µA 1. Guaranteed by characterization results, not tested in production. 2.
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STM32L011x3/4 Electrical characteristics Flash memory and data EEPROM Table 43. Flash memory and data EEPROM characteristics Symbol Conditions Min Typ Max(1) Unit - 1.65 - 3.6 V Erasing - 3.28 3.94 Programming - 3.28 3.94 Average current during the whole programming / erase operation - 500 700 µA Maximum current (peak) TA = 25 °C, VDD = 3.6 V during the whole programming / erase operation - 1.5 2.
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Electrical characteristics 6.3.10 STM32L011x3/4 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs.
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STM32L011x3/4 Electrical characteristics To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Electromagnetic Interference (EMI) The electromagnetic field emitted by the device are monitored while a simple application is executed (toggling 2 LEDs through the I/O ports).
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Electrical characteristics STM32L011x3/4 Table 48. Electrical sensitivities Symbol LU 6.3.12 Parameter Static latch-up class Conditions Class TA = +125 °C conforming to JESD78A II level A I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard pins) should be avoided during normal product operation.
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STM32L011x3/4 6.3.13 Electrical characteristics I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 50 are derived from tests performed under the conditions summarized in Table 18. All I/Os are CMOS and TTL compliant. Table 50.
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Electrical characteristics STM32L011x3/4 Figure 23. VIH/VIL versus VDD (CMOS I/Os) 9,/ 9,+ 9 LQV DOO S 9 '' 3+ 3& 9 ,+PLQ W %227 IRU S H[FH 9 '' + 3 9 ,+PLQ 3& 7 %22 9 ' ' PLQ 9,+PLQ LUH UHTX DUG WDQG 6 V &02 WV 9 ,+ PHQ 9 ,/PD[ ' 9 ' ,QSXW UDQJH QRW JXDUDQWHHG &026 VWDQGDUG UHTXLUHPHQWV 9,/PD[ 9'' 9,/PD[ 9'' 9 06Y 9 Figure 24.
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STM32L011x3/4 Electrical characteristics Output voltage levels Unless otherwise specified, the parameters given in Table 51 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 18. All I/Os are CMOS and TTL compliant. Table 51. Output voltage characteristics Symbol Parameter VOL(1) Output low level voltage for an I/O pin VOH(3) Output high level voltage for an I/O pin Conditions Min Max CMOS port(2), IIO = +8 mA 2.7 V ≤ VDD ≤ 3.
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Electrical characteristics STM32L011x3/4 Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 25 and Table 52, respectively. Unless otherwise specified, the parameters given in Table 52 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 18. Table 52.
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STM32L011x3/4 Electrical characteristics Figure 25. I/O AC characteristics definition (;7(51$/ 287387 21 &/ WU ,2 RXW WI ,2 RXW 7 0D[LPXP IUHTXHQF\ LV DFKLHYHG LI WU WI 7 DQG LI WKH GXW\ F\FOH LV ZKHQ ORDGHG E\ &/ VSHFLILHG LQ WKH WDEOH ³ , 2 $& FKDUDFWHULVWLFV´ 6.3.14 DL G NRST pin characteristics The NRST pin input driver uses CMOS technology.
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Electrical characteristics STM32L011x3/4 Figure 26. Recommended NRST pin protection 9'' ([WHUQDO UHVHW FLUFXLW 538 1567 ,QWHUQDO UHVHW )LOWHU ) 670 /[[ DL F 1. The reset network protects the device against parasitic resets. 2. The external capacitor must be placed as close as possible to the device. 3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 53. Otherwise the reset will not be taken into account by the device. 6.3.
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STM32L011x3/4 Electrical characteristics Table 54. ADC characteristics (continued) Symbol Parameter CADC(3) Internal sample and hold capacitor tCAL(3) Calibration time WLATENCY tlatr(3) JitterADC ADC_DR register write latency Trigger conversion latency Sampling time tSTAB(3) Power-up time tConV (3) Min Typ Max Unit - - - 8 pF fADC = 16 MHz 5.2 µs - 83 1/fADC ADC clock = HSI16 1.5 ADC cycles + 2 fPCLK cycles - 1.5 ADC cycles + 3 fPCLK cycles - ADC clock = PCLK/2 - 4.
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Electrical characteristics STM32L011x3/4 Table 55. RAIN max for fADC = 16 MHz(1) Ts (cycles) tS (µs) RAIN max for fast channels (kΩ) 1.5 0.09 3.5 RAIN max for standard channels (kΩ) VDD > 1.65 V VDD > 1.65 V and and TA > −10 °C TA > 25 °C VDD > 2.7 V VDD > 2.4 V VDD > 2.0 V VDD > 1.8 V VDD > 1.75 V 0.5 < 0.1 NA NA NA NA NA NA 0.22 1 0.2 < 0.1 NA NA NA NA NA 7.5 0.47 2.5 1.7 1.5 < 0.1 NA NA NA NA 12.5 0.78 4 3.2 3 1 NA NA NA NA 19.5 1.22 6.5 5.7 5.5 3.
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STM32L011x3/4 Electrical characteristics Table 56. ADC accuracy(1)(2)(3)(4) Symbol Parameter Conditions Min Typ Max ET Total unadjusted error - 3 5 EO Offset error - 2 2.5 EG Gain error - 2 2.5 EL Integral linearity error - 1.5 2.5 ED Differential linearity error - 1 1.7 9.5 10.5 - 10.7 11.6 - Signal-to-noise distortion 59 65 - Effective number of bits ENOB SINAD 1.65 V < VDDA < 3.
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Electrical characteristics STM32L011x3/4 Figure 28. Typical connection diagram using the ADC 9''$ 97 5$,1 9$,1 $,1[ &SDUDVLWLF 97 6DPSOH DQG KROG $'& FRQYHUWHU 5$'& ELW FRQYHUWHU ,/ Q$ &$'& 06Y 9 1. Refer to Table 54: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy.
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STM32L011x3/4 6.3.17 Electrical characteristics Comparators Table 59. Comparator 1 characteristics Symbol Parameter Conditions Min(1) Typ Max(1) Unit 3.6 V VDDA Analog supply voltage - 1.65 R400K R400K value - - 400 - R10K R10K value - - 10 - Comparator 1 input voltage range - 0.6 - VDDA Comparator startup time VIN tSTART td Voffset dVoffset/dt ICOMP1 kΩ V - - 7 10 (2) Propagation delay - - 3 10 Comparator offset(3) - - ±3 ±10 mV VDDA = 3.
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Electrical characteristics STM32L011x3/4 Table 60. Comparator 2 characteristics (continued) Symbol Parameter ICOMP2 Current consumption(4) Conditions Typ Max(1) Unit Min Fast mode - 3.5 5 Slow mode - 0.5 2 µA 1. Guaranteed by characterization results, not tested in production. 2. The delay is characterized for 100 mV input step with 10 mV overdrive on the inverting input, the noninverting input set to the reference. 3.
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STM32L011x3/4 6.3.19 Electrical characteristics Communications interfaces I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for: • Standard-mode (Sm) : with a bit rate up to 100 kbit/s • Fast-mode (Fm) : with a bit rate up to 400 kbit/s • Fast-mode Plus (Fm+) : with a bit rate up to 1 Mbit/s.
PAGE 88
Electrical characteristics STM32L011x3/4 Table 63. I2C frequency in all I2C modes Symbol fI2CCLK Parameter Condition Standard-mode 2 Fast-mode 8 I2C clock frequency Fast-mode Plus 88/119 Downloaded from Arrow.com.
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STM32L011x3/4 Electrical characteristics SPI characteristics Unless otherwise specified, the parameters given in the following tables are derived from tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 18. Refer to Section 6.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 64.
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Electrical characteristics STM32L011x3/4 Table 65. SPI characteristics in voltage Range 2 (1) Symbol Parameter Conditions Min Typ Master mode fSCK 1/tc(SCK) SPI clock frequency Slave mode Transmitter 1.65
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STM32L011x3/4 Electrical characteristics Table 66.
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Electrical characteristics STM32L011x3/4 Figure 29. SPI timing diagram - slave mode and CPHA = 0 166 LQSXW WF 6&. WVX 166 WK 166 WZ 6&.+ WU 6&. 6&. LQSXW &3+$ &32/ &3+$ &32/ WD 62 WZ 6&./ WY 62 WK 62 )LUVW ELW 287 0,62 RXWSXW WI 6&. 1H[W ELWV 287 WGLV 62 /DVW ELW 287 WK 6, WVX 6, )LUVW ELW ,1 026, LQSXW 1H[W ELWV ,1 /DVW ELW ,1 06Y 9 Figure 30. SPI timing diagram - slave mode and CPHA = 1(1) 166 LQSXW WF 6&. WVX 166 WZ 6&.+ WD 62 WZ 6&./ WI 6&. WK 166 6&.
PAGE 93
STM32L011x3/4 Electrical characteristics Figure 31. SPI timing diagram - master mode(1) +LJK 166 LQSXW 6&. 2XWSXW &3+$ &32/ 6&. 2XWSXW WF 6&. &3+$ &32/ &3+$ &32/ &3+$ &32/ WVX 0, 0,62 ,13 87 WZ 6&.+ WZ 6&./ 06% ,1 WU 6&. WI 6&. %,7 ,1 /6% ,1 WK 0, 026, 287387 06% 287 % , 7 287 WY 02 /6% 287 WK 02 DL G 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. DocID027973 Rev 5 93/119 93 Downloaded from Arrow.com.
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Package information 7 STM32L011x3/4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at http://www.st.com. ECOPACK® is an ST trademark. 7.1 LQFP32 package information Figure 32. LQFP32 - 32-pin, 7 x 7 mm, 32-pin low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.
PAGE 95
STM32L011x3/4 Package information Table 67. LQFP32 - 32-pin, 7 x 7 mm, 32-pin low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.600 - - 0.
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Package information STM32L011x3/4 LQFP32 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 34. Example of LQFP32 marking (package top view) 3URGXFW LGHQWLILFDWLRQ 670 / . 7 'DWH FRGH < :: 5HYLVLRQ FRGH 3LQ LQGHQWLILHU 5 06Y 9 1.
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STM32L011x3/4 7.2 Package information UFQFPN32 package information Figure 35. UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline ' $ H $ $ GGG & & 6($7,1*3/$1( ' E H ( E ( ( / 3,1 ,GHQWLILHU ' / $ % B0(B9 1. Drawing is not to scale. 2. There is an exposed die pad on the underside of the UFQFPN package. It is recommended to connect and solder this backside pad to PCB ground. DocID027973 Rev 5 97/119 115 Downloaded from Arrow.com.
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Package information STM32L011x3/4 Table 68. UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 - - 0.050 - - 0.0020 A3 - 0.152 - - 0.0060 - b 0.180 0.230 0.280 0.0071 0.0091 0.0110 D 4.900 5.000 5.100 0.1929 0.1969 0.2008 D1 3.400 3.500 3.600 0.1339 0.1378 0.1417 D2 3.400 3.500 3.600 0.1339 0.1378 0.1417 E 4.
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STM32L011x3/4 Package information Device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 37. Example of UFQFPN32 marking (package top view) 3URGXFW LGHQWLILFDWLRQ / . 'DWH FRGH < :: 5HYLVLRQ FRGH 5 3LQ LQGHQWLILHU 06Y 9 1.
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Package information 7.3 STM32L011x3/4 WLCSP25 package information Figure 38. WLCSP25 - 25-ball, 2.133 x 2.070 mm, 0.4 mm pitch wafer level chip scale package outline H EEE = $ EDOO ORFDWLRQ ) H * $ 'HWDLO $ H H ( $ $ $ %XPS VLGH 6LGH YLHZ %XPS $ RULHQWDWLRQ UHIHUHQFH HHH = DDD $ E EDOOV FFF = ; < GGG = [ :DIHU EDFN VLGH E = 6HDWLQJ SODQH 'HWDLO $ URWDWHG :/&63 B$ 0B0(B9 1. Drawing is not to scale. Table 69. WLCSP25 - 25-ball, 2.133 x 2.070 mm, 0.
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STM32L011x3/4 Package information Table 69. WLCSP25 - 25-ball, 2.133 x 2.070 mm, 0.4 mm pitch wafer level chip scale package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max G - 0.235 - - 0.0093 - aaa - - 0.100 - - 0.0039 bbb - - 0.100 - - 0.0039 ccc - - 0.100 - - 0.0039 ddd - - 0.050 - - 0.0020 eee - - 0.050 - - 0.0020 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Back side coating. 3.
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Package information STM32L011x3/4 Device marking The following figure gives an example of topside marking versus ball A1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 40. Example of WLCSP25 marking (package top view) %DOO $ LGHQWLILHU 3URGXFW LGHQWLILFDWLRQ 5HYLVLRQ FRGH 5 / 'DWH FRGH
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STM32L011x3/4 7.4 Package information UFQFPN28 4 x 4 mm package information Figure 41. UFQFPN28 - 28-lead, 4x4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline 'HWDLO < ' ( ' ' ( 'HWDLO = ! " ?-%?6 1. Drawing is not to scale. Table 71. UFQFPN28 - 28-lead, 4x4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data(1) millimeters inches Symbol Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 - 0.000 0.050 - 0.0000 0.
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Package information STM32L011x3/4 Table 71. UFQFPN28 - 28-lead, 4x4 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data(1) millimeters inches Symbol Min Typ Max Min Typ Max b 0.200 0.250 0.300 0.0079 0.0098 0.0118 e - 0.500 - - 0.0197 - 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 42. UFQFPN28 recommended footprint 1. Dimensions are expressed in millimeters.
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STM32L011x3/4 Package information UFQFPN28 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 43. Example of UFQFPN28 marking (package top view) 3URGXFW LGHQWLILFDWLRQ / * 'DWH FRGH 3LQ LQGHQWLILHU < :: 5HYLVLRQ FRGH 5 06Y 9 1.
PAGE 106
Package information 7.5 STM32L011x3/4 UFQFPN20 package information Figure 44. UFQFPN20 - 20-lead, 3x3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline ' ( 3LQ 723 9,(: ' ' H / / GGG / $ H E ( ( / $ %27720 9,(: $ 6,'( 9,(: $ $ B0(B9 1. Drawing is not to scale. Table 72. UFQFPN20 - 20-lead, 3x3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data inches(1) millimeters Symbol 106/119 Downloaded from Arrow.com.
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STM32L011x3/4 Package information Table 72. UFQFPN20 - 20-lead, 3x3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max b 0.180 0.250 0.300 0.0071 0.0098 0.0118 e - 0.500 - - 0.0197 - ddd - - 0.050 - - 0.0020 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 45. UFQFPN20 - 20-lead, 3x3 mm, 0.
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Package information STM32L011x3/4 UFQFPN20 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 46. Example of UFQFPN20 marking (package top view) 3URGXFW LGHQWLILFDWLRQ / ) 'DWH FRGH < :: 5HYLVLRQ FRGH 5 3LQ LQGHQWLILHU 06Y 9 1.
PAGE 109
STM32L011x3/4 7.6 Package information TSSOP20 package information Figure 47.TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package outline ' F ( ( 6($7,1* 3/$1( & PP *$8*( 3/$1( 3,1 ,'(17,),&$7,21 N DDD & $ $ $ E / / H <$B0(B9 1. Drawing is not to scale. Table 73. TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package mechanical data inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. A - - 1.
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Package information STM32L011x3/4 Table 73. TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package mechanical data (continued) inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. k 0° - 8° 0° - 8° aaa - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 3.
PAGE 111
STM32L011x3/4 Package information Device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 49. Example of TSSOP20 marking (package top view) 3URGXFW LGHQWLILFDWLRQ / ) 3 3LQ LQGHQWLILHU 'DWH FRGH < :: 5HYLVLRQ FRGH 5 06Y 9 1.
PAGE 112
Package information 7.7 STM32L011x3/4 TSSOP14 package information Figure 50.TSSOP14 – 14-lead thin shrink small outline, 5.0 x 4.4 mm, 0.65 mm pitch, package outline $ C % % 3%!4).' 0,!.% # MM '!'% 0,!.% 0). )$%.4)&)#!4)/. K AAA # ! ! , ! B , E 433/0 ? 2?-%?6 1. Drawing is not to scale. Table 74. TSSOP14 – 14-lead thin shrink small outline, 5 x 4.4 mm, 0.65 mm pitch, package mechanical data inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. A - - 1.
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STM32L011x3/4 Package information TSSOP14 device marking The following figure gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks, which depends assembly location, are not indicated below. Figure 51. Example of TSSOP14 marking (package top view) 3URGXFW LGHQWLILFDWLRQ / ' 3 'DWH FRGH < 5HYLVLRQ FRGH :: 5 3LQ LQGHQWLILHU 06Y 9 1.
PAGE 114
Package information STM32L011x3/4 Table 75. Thermal characteristics Symbol ΘJA Parameter Value Thermal resistance junction-ambient LQFP32 - 7 x 7 mm / 0.8 mm pitch 60 Thermal resistance junction-ambient UFQFPN32 - 5 x 5 mm / 0.5 mm pitch 39 Thermal resistance junction-ambient WLCSP25 - 2.133 x 2.070 mm, 0.4 mm pitch 70 Thermal resistance junction-ambient UFQFPN28 - 4 x 4 mm, 0.5 mm pitch 97 Thermal resistance junction-ambient UFQFPN20 - 3 x 3 mm, 0.
PAGE 115
STM32L011x3/4 8 Ordering information Ordering information Table 76.
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Revision history 9 STM32L011x3/4 Revision history Table 77. Document revision history Date Revision 07-Dec-2015 1 Initial release. 2 Features: modified current consumption in run mode, Cortex®-M0+ core frequency range and total number of timers. Updated ADC conversion consumption on cover page. Updated UFQFPN28 pinout: Figure 6: STM32L011x3/4 UFQFPN28 pinout and Table 13: Pin definitions. Updated Table 55: RAIN max for fADC = 16 MHz.
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STM32L011x3/4 Revision history Table 77. Document revision history Date 20-Jun-2016 Revision Changes 4 Updated: – Features in cover page: Stop mode values, channels’ number of DMA controller, I/Os’ number, number of peripherals communication interface.
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Revision history STM32L011x3/4 Table 77. Document revision history Date 12-Sep-2017 Revision 5 (continued) Changes In Section 7: Package information: – Added paragraph related to optional marking or inset/upset marks in all device marking sections. – Updated Table 67: LQFP32 - 32-pin, 7 x 7 mm, 32-pin low-profile quad flat package mechanical data. – Updated Figure 35: UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin fine pitch quad flat package outline and Table 68: UFQFPN32 - 32-pin, 5x5 mm, 0.
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STM32L011x3/4 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.