Datasheet

DS12323 Rev 2 87/91
STM32L010F4/K4 Package information
89
Device marking for LQFP32
Figure 33 gives an example of topside marking versus pin 1 position identifier location.
Other optional marking or inset/upset marks depending on supply-chain operations, are not
indicated below.
Figure 33. LQFP32 marking example (package top view)
1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet
qualified and therefore not approved for use in production. ST is not responsible for any consequences
resulting from such use. In no event will ST be liable for the customer using any of these engineering
samples in production. ST’s Quality department must be contacted prior to any decision to use these
engineering samples to run a qualification activity.
7.3 Thermal characteristics
The maximum chip-junction temperature, T
J
max, in °C, may be calculated using the
following equation:
T
J
max = T
A
max + (P
D
max × ϴ
JA
)
Where:
• T
A
max is the maximum ambient temperature in °C
•
ϴ
JA
is the package junction-to-ambient thermal resistance in °C/W
• P
D
max is the sum of P
INT
max and P
I/O
max (P
D
max = P
INT
max + P
I/O
max),
• P
INT
max is the product of I
DD
and V
DD
, expressed in Watts. This is the maximum chip
internal power.
P
I/O
max represents the maximum power dissipation on output pins where:
P
I/O
max= Σ(V
OL
× I
OL
) + Σ((V
DD
– V
OH
) × I
OH
),
taking into account the actual V
OL
/ I
OL
and V
OH
/ I
OH
of the I/Os at low and high level in the
application.
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