Datasheet

Electrical characteristics STM32L010F4/K4
68/91 DS12323 Rev 2
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or
source up to ±15 mA with the non-standard V
OL
/V
OH
specifications given in Table 49 .
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in Section 6.2:
• The sum of the currents sourced by all the I/Os on V
DD,
plus the maximum Run
consumption of the MCU sourced on V
DD,
cannot exceed the absolute maximum rating
I
VDD(Σ)
(see Table 13).
• The sum of the currents sunk by all the I/Os on V
SS
plus the maximum Run
consumption of the MCU sunk on V
SS
cannot exceed the absolute maximum rating
I
VSS(Σ)
(see Table 13).
Output voltage levels
Unless otherwise specified, the parameters given in Table 49 are derived from tests
performed under ambient temperature and V
DD
supply voltage conditions summarized in
Table 15 . All I/Os are CMOS and TTL compliant.
Table 49. Output voltage characteristics
Symbol Parameter Conditions Min Max Unit
V
OL
(1)
1. The I
IO
current sunk by the device must always respect the absolute maximum rating specified in Table 13.
The sum of the currents sunk by all the I/Os (I/O ports and control pins) must always be respected and
must not exceed ΣI
IO(PIN)
.
Output low level voltage for an I/O pin CMOS port
(2)
,
I
IO
= +8 mA
2.7 V ≤ V
DD
≤ 3.6 V
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
-0.4
V
V
OH
(3)
3. The I
IO
current sourced by the device must always respect the absolute maximum rating specified in
Table 13. The sum of the currents sourced by all the I/Os (I/O ports and control pins) must always be
respected and must not exceed ΣI
IO(PIN)
.
Output high level voltage for an I/O pin V
DD
- 0.4 -
V
OL
(1)
Output low level voltage for an I/O pin
TTL port
(2)
,
I
IO
= +8 mA
2.7 V ≤ V
DD
≤ 3.6 V
-0.4
V
OH
(3)(4)
4. Guaranteed by characterization results, not tested in production.
Output high level voltage for an I/O pin
TTL port
(2)
,
I
IO
= –6mA
2.7 V ≤ V
DD
≤ 3.6 V
2.4 -
V
OL
(1)(4)
Output low level voltage for an I/O pin
I
IO
= +15 mA
2.7 V ≤ V
DD
≤ 3.6 V
-1.3
V
OH
(3)(4)
Output high level voltage for an I/O pin
I
IO
= –15 mA
2.7 V ≤ V
DD
≤ 3.6 V
V
DD
- 1.3 -
V
OL
(1)(4)
Output low level voltage for an I/O pin
I
IO
= +4 mA
1.8 V ≤ V
DD
≤ 3.6 V
-0.45
V
OH
(3)(4)
Output high level voltage for an I/O pin
I
IO
= –4 mA
1.8 V ≤ V
DD
≤ 3.6 V
V
DD
- 0.45 -
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