Datasheet

DS12323 Rev 2 67/91
STM32L010F4/K4 Electrical characteristics
81
Figure 19. V
IH
/V
IL
versus VDD (CMOS I/Os)
Figure 20. V
IH
/V
IL
versus VDD (TTL I/Os)
R
PD
Weak pull-down
equivalent resistor
(5)
V
IN
= V
DD
25 45 65 kΩ
C
IO
I/O pin capacitance - - 5 - pF
1. Guaranteed by characterization, not tested in production
2. Hysteresis voltage between Schmitt trigger switching levels. Guaranteed by characterization results, not
tested in production.
3. With a minimum of 200 mV. Guaranteed by characterization results, not tested in production.
4. The max. value may be exceeded if negative current is injected on adjacent pins.
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order).
Table 48. I/O static characteristics (continued)
Symbol Parameter Conditions Min Typ Max Unit
06Y9
9
''
9
9
,+PLQ

9
,/PD[

9
,/
9
,+
9

 
&026VWDQGDUGUHTXLUHPHQWV9
,+PLQ
9
''
9
,/PD[
9
''

  
&026VWDQGDUGUHTXLUHPHQWV9
,/PD[
9
''
9
,+PLQ
9
''
DOOSLQV
H[FHSW%2273&3+
9
,+PLQ
9
''
IRU
%2273&3+
,QSXWUDQJHQRW
JXDUDQWHHG
06Y9
9
''
9
9
,+PLQ

9
,/PD[

9
,/
9
,+
9

 
77/VWDQGDUGUHTXLUHPHQWV9
,+PLQ
9
9
,/PD[
9
''

  
77/VWDQGDUGUHTXLUHPHQWV9
,/PD[
9
,QSXWUDQJHQRW
JXDUDQWHHG
9
,+PLQ
9
''
DOOSLQV
H[FHSW%2273&3+
9
,+PLQ
9
''
IRU
%2273&3+
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