Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 16KB LQFP

This is information on a product in full production.

September 2018 DS12323 Rev 2 1/91

STM32L010F4

STM32L010K4

Value line ultra-low-power 32-bit MCU Arm

-based Cortex

-M0+,

16-Kbyte Flash memory, 2-Kbyte SRAM, 128-byte EEPROM, ADC

Datasheet - production data

Features

•

Ultra-low-power platform

– 1.8 V to 3.6 V power supply

–

40 to 85 °C temperature range

– 0.23 µA Standby mode (2 wakeup pins)

– 0.29 µA Stop mode (16 wakeup lines)

– 0.54 µA Stop mode + RTC + 2-Kbyte RAM

retention

– Down to 76 µA/MHz in Run mode

– 5 µs wakeup time (from Flash memory)

– 41 µA 12-bit ADC conversion at 10 ksps

•

Core: Arm

32-bit Cortex

-M0+

– From 32 kHz to 32 MHz

– 0.95 DMIPS/MHz

• Reset and supply management

– Ultra-low-power BOR (brownout reset) with

5 selectable thresholds

– Ultra-low-power POR/PDR

•

Clock sources

– 0 to 32 MHz external clock

– 32 kHz oscillator for RTC with calibration

– High-speed internal 16 MHz factory-trimmed RC

(±1%)

– Internal low-power 37 kHz RC

– Internal multispeed low-power 65 kHz to

4.2 MHz RC

– PLL for CPU clock

•

Pre-programmed bootloader

– USART, SPI supported

•

Development support

– Serial wire debug supported

•

Up to 26 fast I/Os (23 I/Os 5-Volt tolerant)

•

Memories

– 16-Kbyte Flash memory

– 2-Kbyte RAM

– 128 bytes of data EEPROM

– 20-byte backup register

– Sector protection against R/W operation

•

Analog peripherals

– 12-bit ADC 1.14 Msps up to 10 channels (down

to 1.8 V)

•

5-channel DMA controller, supporting ADC, SPI,

I2C, USART and timers

•

4x peripherals communication interface

•

1x USART, 1x LPUART (low power)

•

1x SPI 16 Mbit/s

•

1x I2C (SMBus/PMBus)

•

7x timers: 1x 16-bit with up to 4 channels,

1x 16-bit with up to 2 channels, 1x 16-bit ultra-low-

power timer, 1x SysTick, 1x RTC and 2x watchdogs

(independent/window)

•

CRC calculation unit, 96-bit unique ID

•

All packages are ECOPACK

2 compliant

LQFP32

7x7mm

TSSOP20

169 mils

www.st.com

Downloaded from Arrow.com.

Summary of content (91 pages)

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STM32L010F4 STM32L010K4 Value line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0+, 16-Kbyte Flash memory, 2-Kbyte SRAM, 128-byte EEPROM, ADC Datasheet - production data Features • Ultra-low-power platform – 1.8 V to 3.6 V power supply – –40 to 85 °C temperature range – 0.23 µA Standby mode (2 wakeup pins) – 0.29 µA Stop mode (16 wakeup lines) – 0.
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Contents STM32L010F4/K4 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 Ultra-low-power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Functional overview . . . .
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STM32L010F4/K4 Contents 3.14.4 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.15 Cyclic redundancy check (CRC) calculation unit . . . . . . . . . . . . . . . . . . . 27 3.16 Serial wire debug port (SW-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . .
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Contents 7 STM32L010F4/K4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 7.1 TSSOP20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 7.2 LQFP32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 7.3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 8 Ordering information . . . . . . . . . . . . . . . . . . . . .
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STM32L010F4/K4 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44.
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List of tables Table 45. Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. 6/91 Downloaded from Arrow.com. STM32L010F4/K4 ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32L010F4/K4 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. STM32L010F4/K4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Introduction 1 STM32L010F4/K4 Introduction The STM32L010F4/K4 ultra-low-power microcontrollers are part of the STM32L010 value line.
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STM32L010F4/K4 2 Description Description The ultra-low-power STM32L010F4/K4 microcontrollers incorporate the high-performance Arm® Cortex®-M0+ 32-bit RISC core operating at 32 MHz, high-speed embedded memories (16 Kbytes of Flash program memory, 128 bytes of data EEPROM and 2 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals. The STM32L010F4/K4 provide high power efficiency over a wide performance range.
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Description 2.1 STM32L010F4/K4 Device overview Table 1. STM32L010F4/K4 features and peripheral counts Feature and peripheral count STM32L010F4 Flash memory (Kbytes) 16 Data EEPROM (bytes) 128 RAM (Kbytes) 2 Timers General-purpose 2 LPTIM 1 RTC / SYSTICK / IWDG / WWDG Communication interfaces 1/1/1/1 SPI 1 I2C 1 USART 1 LPUART 1 GPIOs Clocks: 16 HSE(1) / LSE / HSI / MSI / LSI 12-bit synchronized ADC / Number of channels 1/7 1/10 32 MHz Operating voltage range 1.8 to 3.
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STM32L010F4/K4 Description Figure 1. STM32L010F4/K4 block diagram 6:' 6:' )/$6+ ((3520 %227 &257(; 0 &38 )PD[ 0+] 5$0 '%* '0$ 19,& $ 3 % $'& $,1[ 63, 0,62 026, 6&. 166 7,0 FK (;7, %5,'*( &5& %5,'*( *3,2 3257 $ 3%> @ *3,2 3257 % 3&> @ *3,2 3257 & &.B,1 +6( /37,0 $+% )PD[ 0+] 3$> @ ::'* , & $ 3 % ,1 ,1 (75 287 6&/ 6'$ 60%$ 86$57 5; 7; 576 &76 &. /38$57 5; 7; 576 &76 +6, 0 /6, ,:'* 3// 06, 7,0 FK 57& %&.
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Description 2.2 STM32L010F4/K4 Ultra-low-power device continuum The ultra-low-power microcontrollers’ family offers a large choice of core and features, from 8-bit proprietary core up to Arm® Cortex®-M4, including Arm® Cortex®-M3 and Arm® Cortex®-M0+. The STM32Lx series are the best choice to answer application needs in terms of ultra-low-power features and the best solution for applications such as gas/water meter, keyboard/mouse or fitness and healthcare applications.
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STM32L010F4/K4 Functional overview 3 Functional overview 3.1 Low-power modes The STM32L010F4/K4 support dynamic voltage scaling to optimize its power consumption in Run mode. The voltage from the internal low-drop regulator that supplies the logic, can be adjusted according to the maximum operating frequency of the system.
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Functional overview • STM32L010F4/K4 Stop mode without RTC The Stop mode achieves the lowest power consumption while retaining the RAM and register contents. All clocks are stopped. The PLL, MSI RC, HSI and LSI RC, HSE bypass input and LSE crystal oscillator are disabled. Some peripherals featuring wakeup capability can enable the HSI RC during Stop mode to detect their wakeup condition. The voltage regulator is in Low-power mode. The device can be woken up from Stop mode by any of the EXTI line. In 3.
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STM32L010F4/K4 Functional overview Table 3.
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Functional overview STM32L010F4/K4 Table 3. Functionalities depending on the working mode (from Run/active down to Standby)(1)(2) (continued) Run/active mode IP Sleep mode Lowpower run mode Down to Down to 140 µA/MHz 37 µA/MHz Down (from Flash (from Flash to 8 µA memory) memory) Consumption VDD=1.8 to 3.6 V (typ) Lowpower sleep mode Stop mode Standby mode Wakeup capability Wakeup capability 0.29 µA (no RTC) VDD=1.8 V 0.1 µA (no RTC) VDD=1.8 V 0.41 µA (with RTC) 0.54 µA (with VDD=1.
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STM32L010F4/K4 Functional overview Table 4. STM32L010F4/K4 peripherals interconnect matrix (continued) Interconnect source GPIO Interconnect destination Run Sleep Lowpower run Lowpower sleep Stop TIMx Timer input channel and trigger Y Y Y Y - LPTIM1 Timer input channel and trigger Y Y Y Y Y Conversion trigger Y Y Y Y - ADC 3.
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Functional overview STM32L010F4/K4 3.4 Reset and supply management 3.4.1 Power supply schemes 3.4.2 • VDD (1.8 to 3.6 V): external power supply for I/Os and the internal regulator. Provided externally through VDD pins. • VSSA, VDDA (1.8 to 3.6 V): external analog power supplies for ADC, reset blocks, RCs and PLL. VDDA and VSSA must be connected to VDD and VSS, respectively.
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STM32L010F4/K4 3.5 Functional overview Clock management The clock controller distributes the clocks coming from different oscillators to the core and the peripherals. It also manages clock gating for low-power modes and ensures clock robustness. Its associated features are the listed below: • Clock prescaler To get the best trade-off between speed and current consumption, the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.
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Functional overview STM32L010F4/K4 Figure 2. Clock tree #9 (QDEOH :DWFKGRJ /6, 5& :DWFKGRJ /6 /6, WHPSR /HJHQG +6( +LJK VSHHG H[WHUQDO FORFN VLJQDO +6, +LJK VSHHG LQWHUQDO FORFN VLJQDO /6, /RZ VSHHG LQWHUQDO FORFN VLJQDO /6( /RZ VSHHG H[WHUQDO FORFN VLJQDO 06, 0XOWLVSHHG LQWHUQDO FORFN VLJQDO 57&6(/ 57& HQDEOH /6( 26& 57& /6( WHPSR /68 /6' /6' #9 #9 06, 5& /6, /6( 06, /HYHO VKLIWHUV #9 0&26(/ $'& HQDEOH $'&&/.
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STM32L010F4/K4 3.6 Functional overview Low-power real-time clock and backup registers The real time clock (RTC) and the 5 backup registers are supplied in all modes including Standby mode. The backup registers are five 32-bit registers used to store 20 bytes of user application data. They are not reset by a system reset, or when the device wakes up from Standby mode. The RTC is an independent BCD (binary-coded decimal) timer/counter.
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Functional overview STM32L010F4/K4 16 configurable interrupt/event lines. The 7 other lines are connected to RTC, USART, I2C, LPUART or LPTIM events. 3.8 Memories The STM32L010F4/K4 integrate the following memories: • 2 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait state. With the enhanced bus matrix, operating the RAM does not lead to any performance penalty during accesses to the system bus (AHB and APB buses).
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STM32L010F4/K4 Functional overview frequencies (~25 µA at 10 ksps, ~200 µA at 1 Msps). An auto-shutdown function guarantees that the ADC is powered off except during the active conversion phase. The ADC can be served by the DMA controller. The ADC features a hardware oversampler up to 256 samples, this improves the resolution to 16 bits. See the application note Improving STM32F1x and STM32L1x ADC resolution by oversampling (AN2668).
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Functional overview 3.13 STM32L010F4/K4 Timers and watchdogs The ultra-low-power STM32L010F4/K4 include two general-purpose timers, one low- power timer (LPTIM1), two watchdog timers and the SysTick timer. 3.13.1 General-purpose timers (TIM2, TIM21) Table 5 compares the features of the general-purpose timers. Table 5.
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STM32L010F4/K4 3.13.2 Functional overview Low-power timer (LPTIM) LPTIM1 has an independent clock and is running also in Stop mode if it is clocked by LSE, LSI or an external clock. This timer is able to wakeup the STM32L010F4/K4 from Stop mode. LPTIM1 supports the following features: 3.13.
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Functional overview STM32L010F4/K4 In addition, I2C1 provides hardware support for SMBus 2.0 and PMBus 1.1: ARP capability, Host notify protocol, hardware CRC (PEC) generation/verification, timeouts verifications and ALERT protocol management. I2C1 also has a clock domain independent from the CPU clock, allowing the I2C1 to wake up the MCU from Stop mode on address match. The I2C interface can be served by the DMA controller. Refer to Table 6 for the supported modes and features of I2C interface. Table 6.
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STM32L010F4/K4 Functional overview Table 7. USART implementation (continued) USART modes/features(1) USART2 Auto baud rate detection (4 modes) - Driver enable X 1. X = supported. 3.14.3 Low-power universal asynchronous receiver transmitter (LPUART) The STM32L010F4/K4 embed one low-power UART. The LPUART supports asynchronous serial communication with minimum power consumption. It supports half-duplex single-wire communication and modem operations (CTS/RTS). It allows multiprocessor communication.
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Functional overview STM32L010F4/K4 Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity. The CRC calculation unit helps to compute a signature of the software during runtime, to be compared with a reference signature generated at linktime and stored at a given memory location. 3.
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STM32L010F4/K4 4 Pin descriptions Pin descriptions Figure 3. STM32L010F4/K4 TSSOP20 pinout 3% %227 3& 26& B,1 3& 26& B287 3$ 1567 3$ 9''$ 9'' 3$ &.B,1 966 3$ 3$ 3$ 3% 3$ 3$ 3$ 3$ 3$ 3$ 06Y 9 1. The above figure shows the package top view. 3$ 3% 3% 3% 3% 3% 3% %227 966 Figure 4.
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Pin descriptions STM32L010F4/K4 Table 9. Legend/abbreviations used in the pinout table Name Abbreviation Definition Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name Pin name S Supply pin I Input only pin Pin type I/O structure Notes I/O Input/output pin FT 5 V tolerant I/O TTa 3.3 V tolerant I/O directly connected to the ADC TC Standard 3.
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STM32L010F4/K4 Pin descriptions Table 10.
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Pin descriptions STM32L010F4/K4 Table 10.
PAGE 33
Downloaded from Arrow.com.
PAGE 34
Port B Port 34/91 Downloaded from Arrow.com. SPI1_MOSI USART2_TX USART2_RX PB5 PB6 PB7 SPI1_SCK PB3 SPI1_MISO USART2_CK PB1 PB4 EVENTOUT I2C1_SDA I2C1_SCL - - - SPI1_MOSI SPI1_MISO SPI1/I2C1/ LPTIM SPI1/USART2/ TIM21/ EVENOUT/ SYS_AF PB0 AF1 AF0 LPTIM1_IN2 LPTIM1_ETR LPTIM1_IN1 EVENTOUT TIM2_CH2 LPTIM1_IN1 TIM2_CH2 LPUART1/ LPTIM/TIM2/E VENOUT/ SYS_AF AF2 - - I2C1_SMBA - - - - I2C1/EVENOUT AF3 Table 11.
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STM32L010F4/K4 5 Memory mapping Memory mapping Refer to the product line reference manual for details on the memory mapping as well as the boundary addresses for all peripherals. DS12323 Rev 2 35/91 35 Downloaded from Arrow.com.
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Electrical characteristics STM32L010F4/K4 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 6.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
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STM32L010F4/K4 6.1.6 Electrical characteristics Power supply scheme Figure 7. Power supply scheme 287 *3 , 2V ,1 /HYHO VKLIWHU 6WDQGE\ SRZHU FLUFXLWU\ 26& 57& :DNH XS ORJLF 57& EDFNXS UHJLVWHUV ,2 /RJLF .HUQHO ORJLF &38 'LJLWDO 0HPRULHV 9'' 9'' 5HJXODWRU 1 î Q) î ) 966 9''$ 9''$ Q) ) $'& $QDORJ 5& 3// « 966$ 06Y 9 1. VSSA is internally connected to VSS on all packages. 6.1.7 Current consumption measurement Figure 8.
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Electrical characteristics 6.2 STM32L010F4/K4 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 12: Voltage characteristics, Table 13: Current characteristics, and Table 14: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
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STM32L010F4/K4 Electrical characteristics Table 13. Current characteristics Symbol Ratings Max.
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Electrical characteristics STM32L010F4/K4 6.3 Operating conditions 6.3.1 General operating conditions Table 15. General operating conditions Symbol Parameter Conditions Min Max Unit fHCLK Internal AHB clock frequency - 0 32 fPCLK1 Internal APB1 clock frequency - 0 32 fPCLK2 Internal APB2 clock frequency - 0 32 VDD Standard operating voltage - 1.8 3.6 V VDDA Analog operating voltage (all features) Must be the same voltage as VDD(1) 1.8 3.6 V 2.0 V ≤ VDD ≤ 3.6 V –0.
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STM32L010F4/K4 Electrical characteristics Table 16. Embedded reset and power control block characteristics (continued) Symbol Parameter VPOR/PDR Power on/power down reset threshold VBOR0 Brownout reset threshold 0 VBOR1 Brownout reset threshold 1 VBOR2 Brownout reset threshold 2 VBOR3 Brownout reset threshold 3 VBOR4 Brownout reset threshold 4 Vhyst Hysteresis voltage Conditions Min Typ Max Falling edge 1 1.5 1.8 Rising edge 1.3 1.5 1.8 Falling edge 1.67 1.7 1.
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Electrical characteristics STM32L010F4/K4 Table 18. Embedded internal reference voltage(1) (continued) Symbol Parameter VDDCoeff(4) Voltage coefficient Conditions 3.0 V < VDDA < 3.6 V Min Typ Max Unit - - 2000 ppm/V TS_vrefint(4)(5) ADC sampling time when reading the internal reference voltage - 5 10 - µs TADC_BUF(4) Startup time of reference voltage buffer for ADC - - - 10 µs IBUF_ADC(4) Consumption of reference voltage buffer for ADC - - 13.
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STM32L010F4/K4 Electrical characteristics The MCU is placed under the following conditions: • All I/O pins are configured in analog input mode • All peripherals are disabled except when explicitly mentioned • The Flash memory access time and prefetch is adjusted depending on fHCLK frequency and voltage range to provide the best CPU performance unless otherwise specified.
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Electrical characteristics STM32L010F4/K4 Table 20. Current consumption in Run mode vs code type, code with data processing running from Flash memory Symbol IDD (Run from Flash memory) Parameter Supply current in Run mode, code executed from Flash memory Conditions fHCLK Range 3, VCORE = 1.2 V, VOS[1:0] = 11 fHSE = fHCLK up to 16 MHz included, fHSE = fHCLK/2 above 16 MHz (PLL ON)(1) Typ Dhrystone 460 CoreMark 440 Fibonacci 4 MHz 330 while(1) 305 while(1), prefetch OFF 320 Dhrystone 5.
PAGE 45
STM32L010F4/K4 Electrical characteristics Figure 10. IDD vs VDD, Run mode, code running from Flash memory, Range 2, HSE bypass, 1 ws 06Y 9 Table 21. Current consumption in Run mode, code with data processing running from RAM Symbol Parameter fHCLK Typ Max(1) 1 115 140 2 205 240 4 385 420 4 0.48 0.55 8 0.935 1.1 16 1.8 2 8 1.1 1.4 16 2.1 2.5 32 4.5 4.9 0.065 22 38 0.524 67 91 4.2 415 450 Range 2, VCORE = 1.5 V, VOS[1:0] = 10 16 1.95 2.
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Electrical characteristics STM32L010F4/K4 2. Oscillator bypassed (HSEBYP = 1 in RCC_CR register). Table 22. Current consumption in Run mode vs code type, code with data processing running from RAM(1) Symbol Parameter Conditions fHCLK Typ Dhrystone Supply current in Run mode, code IDD (Run executed from from RAM, Flash RAM) memory switched OFF fHSE = fHCLK up to 16 MHz, included, fHSE = fHCLK/2 above 16 MHz (PLL ON)(2) 385 Range 3 CoreMark VCORE = 1.
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STM32L010F4/K4 Electrical characteristics Table 23. Current consumption in Sleep mode (continued) Symbol Parameter fHCLK Typ Max(1) 1 49 88 2 69 120 4 115 190 4 135 200 8 240 340 16 460 650 8 290 400 16 565 750 32 1350 1900 0.065 26.5 46 0.524 38.5 70 4.2 125 190 Range 2, VCORE = 1.5 V, VOS[1:0] = 10 16 600 760 Range 1, VCORE = 1.8 V, VOS[1:0] = 01 32 1500 1850 Conditions (MHz) Range 3, VCORE = 1.
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Electrical characteristics STM32L010F4/K4 Table 24. Current consumption in Low-power run mode Symbol Parameter Conditions MSI clock = 65 KHz fHCLK = 32 KHz IDD (LP run) Supply current in Low-power run mode All peripherals OFF, code executed from MSI clock = 65 KHz RAM, Flash memory fHCLK = 65 KHz switched OFF, VDD from 1.8 V to 3.6 V MSI clock = 131 KHz fHCLK = 131 KHz MSI clock = 65 KHz fHCLK = 32 KHz All peripherals OFF, code executed from Flash memory, VDD from 1.8 V to 3.
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STM32L010F4/K4 Electrical characteristics Table 25. Current consumption in Low-power sleep mode Symbol Parameter Typ Max(1) TA = -40 °C to 25 °C 2.5(2) - MSI clock = 65 KHz fHCLK = 32 KHz Flash ON TA = -40 °C to 25 °C 13 19 TA = 85 °C 15.5 20 MSI clock = 65 KHz fHCLK = 65 KHz Flash ON TA = -40 °C to 25 °C 13.5 19 16 20 MSI clock = 131 KHz fHCLK = 131 KHz Flash ON TA = -40 °C to 25 °C 15.
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Electrical characteristics STM32L010F4/K4 Figure 13. IDD vs VDD, Stop mode with RTC disabled, all clocks off 06Y 9 Table 26. Typical and maximum current consumptions in Stop mode Symbol IDD (Stop) Typ Max(1) TA = –40°C to 25°C 0.34 0.99 TA = 55°C 0.43 1.9 TA= 85°C 0.94 4.2 Parameter Conditions Supply current in Stop mode Unit µA 1. Guaranteed by characterization results, not tested in production, unless otherwise specified. Table 27.
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STM32L010F4/K4 Electrical characteristics Table 28.
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Electrical characteristics STM32L010F4/K4 Table 29. Peripheral current consumption in run or Sleep mode(1) Typical consumption, VDD = 3.0 V, TA = 25 °C Range 1, VCORE = 1.8 V VOS[1:0] = 01 Range 2, VCORE = 1.5 V VOS[1:0] = 10 Range 3, VCORE = 1.2 V VOS[1:0] = 11 Low-power sleep and run WWDG 2.5 2 1.6 2 LPUART1 8.3 7.2 5.4 7.2 I2C1 11 8.2 6.8 8.9 LPTIM1 14 11 8.7 11 10.5 8.5 6.4 8.5 8.5 6.8 5.4 7.1 5 3.9 3.3 4 SPI1 4.5 3.5 2.9 3.6 TIM21 6.8 6.1 4.5 5.
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STM32L010F4/K4 Electrical characteristics Table 30. Peripheral current consumption in Stop and Standby mode Symbol Typical consumption, TA = 25 °C Peripheral IDD(BOR) - IREFINT - - LSE low drive(1) - LPTIM1(2), input 100 Hz VDD = 1.8 V VDD = 3.0 V 0.6 1 Unit 3 0.01 µA - LPTIM1, input 1 MHz 8 9 - LPUART1 0.025 0.03 - RTC 0.1 0.19 1. LSE low drive consumption is the difference between an external clock on OSC32_IN and a quartz between OSC32_IN and OSC32_OUT. 2.
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Electrical characteristics STM32L010F4/K4 Table 31. Low-power mode wakeup timings (continued) Symbol Parameter Conditions Typ Max fHCLK = fMSI = 4.2 MHz 5.1 8 fHCLK = fHSI = 16 MHz 5.1 7 fHCLK = fHSI/4 = 4 MHz 8.1 11 fHCLK = fMSI = 4.2 MHz Voltage Range 1 5 8 fHCLK = fMSI = 4.2 MHz Voltage Range 2 5 8 fHCLK = fMSI = 4.2 MHz Voltage Range 3 5 8 fHCLK = fMSI = 2.1 MHz 7.4 13 fHCLK = fMSI = 1.
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STM32L010F4/K4 6.3.6 Electrical characteristics External clock source characteristics High-speed external user clock generated from an external source In bypass mode the input pin is a standard GPIO.The external clock signal has to respect the I/O characteristics in Section 6.3.12. However, the recommended clock input waveform is shown in Figure 14. Table 32.
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Electrical characteristics STM32L010F4/K4 Low-speed external user clock generated from an external source The characteristics given in the following table result from tests performed using a lowspeed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 15. Table 33.
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STM32L010F4/K4 Electrical characteristics time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 34. HSE oscillator characteristics(1) Symbol Conditions Min Typ Max Unit Oscillator frequency - 1 - 25 MHz RF Feedback resistor - - 200 - kΩ Gm Maximum critical crystal transconductance Startup - - 700 µA/V VDD is stabilized - 2 - s fOSC_IN tSU(HSE)(2) Parameter Startup time 1.
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Electrical characteristics STM32L010F4/K4 time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 35. LSE oscillator characteristics(1) Symbol fLSE Gm tSU(LSE) (3) Conditions(2) Min(2) Typ Max Unit - - 32.768 - KHz LSEDRV[1:0]=00 lower driving capability - - 0.5 LSEDRV[1:0]= 01 medium low driving capability - - 0.75 LSEDRV[1:0] = 10 medium high driving capability - - 1.
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STM32L010F4/K4 6.3.7 Electrical characteristics Internal clock source characteristics The parameters given in Table 36 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 15. High-speed internal 16 MHz (HSI16) RC oscillator Table 36. 16 MHz HSI16 oscillator characteristics Symbol Parameter fHSI16 TRIM Frequency (1)(2) ACCHSI16 (2) Conditions Min Typ Max Unit - 16 - MHz - ±0.4 0.7 - - ±1.5 VDDA = 3.
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Electrical characteristics STM32L010F4/K4 Low-speed internal (LSI) RC oscillator Table 37. LSI oscillator characteristics Symbol Parameter Min Typ Max Unit fLSI(1) LSI frequency 26 38 56 KHz DLSI(2) LSI oscillator frequency drift 0°C ≤ TA ≤ 85°C –10 - 4 % LSI oscillator startup time - - 200 µs LSI oscillator power consumption - 400 510 nA tsu(LSI)(3) IDD(LSI) (3) 1. Guaranteed by test in production. 2.
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STM32L010F4/K4 Electrical characteristics Table 38. MSI oscillator characteristics (continued) Symbol tSU(MSI) tSTAB(MSI)(2) fOVER(MSI) Parameter Condition MSI oscillator startup time MSI oscillator stabilization time MSI oscillator frequency overshoot Typ Max MSI range 0 30 - MSI range 1 20 - MSI range 2 15 - MSI range 3 10 - MSI range 4 6 - MSI range 5 5 - MSI range 6, Voltage range 1 and 2 3.
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Electrical characteristics STM32L010F4/K4 Table 39. PLL characteristics (continued) Value Symbol Parameter Min Typ Max(1) Unit fPLL_OUT PLL output clock 2 - 32 MHz tLOCK PLL input = 16 MHz PLL VCO = 96 MHz - 115 160 µs Jitter Cycle-to-cycle jitter - - ± 600 ps IDDA(PLL) Current consumption on VDDA - 220 450 IDD(PLL) Current consumption on VDD - 120 150 µA 1. Guaranteed by characterization results, not tested in production. 2.
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STM32L010F4/K4 Electrical characteristics Table 42. Flash memory and data EEPROM endurance and retention Value Symbol NCYC(2) tRET(2) Parameter Cycling (erase / write) Program memory Conditions Min(1) Unit 10 TA = –40°C to 85 °C Cycling (erase / write) EEPROM data memory kcycles 100 Data retention (program memory) after 10 kcycles at TA = 85 °C Data retention (EEPROM data memory) after 100 kcycles at TA = 85 °C 30 TRET = +85 °C years 30 1.
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Electrical characteristics STM32L010F4/K4 Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular.
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STM32L010F4/K4 Electrical characteristics Table 45. ESD absolute maximum ratings Conditions Class Maximum value(1) Electrostatic discharge voltage (human body model) TA = +25 °C, conforming to ANSI/JEDEC JS-001 2 2000 Electrostatic discharge voltage VESD(CDM) (charge device model) TA = +25 °C, conforming to ANSI/ESD STM5.3.1 C4 Symbol VESD(HBM) Ratings Unit V 500 1. Guaranteed by characterization results, not tested in production.
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Electrical characteristics STM32L010F4/K4 Table 47. I/O current injection susceptibility Functional susceptibility Symbol Description IINJ Negative injection Positive injection Injected current on BOOT0 –0 NA(1) Injected current on PA0, PA4, PA5, PA11, PA12, PC15, PH0 and PH1 –5 0 Injected current on all FT pins –5(2) NA(1) Injected current on any other pin –5(2) +5 Unit mA 1. Current injection is not possible. 2.
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STM32L010F4/K4 Electrical characteristics Table 48. I/O static characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit RPD Weak pull-down equivalent resistor(5) VIN = VDD 25 45 65 kΩ CIO I/O pin capacitance - - 5 - pF 1. Guaranteed by characterization, not tested in production 2. Hysteresis voltage between Schmitt trigger switching levels. Guaranteed by characterization results, not tested in production. 3. With a minimum of 200 mV.
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Electrical characteristics STM32L010F4/K4 Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ±15 mA with the non-standard VOL/VOH specifications given in Table 49. In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.
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STM32L010F4/K4 Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 21 and Table 50, respectively. Unless otherwise specified, the parameters given in Table 50 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 15. Table 50.
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Electrical characteristics STM32L010F4/K4 Table 50. I/O AC characteristics(1)(2) (continued) OSPEEDRx [1:0] bit value(1) Symbol Parameter Conditions (4) Fmax(IO)out Maximum frequency 11 - tf(IO)out tr(IO)out Output rise and fall time tEXTIpw Pulse width of external signals detected by the EXTI controller Min Max(3) Unit CL = 30 pF, VDD = 2.7 V to 3.6 V - 35 CL = 50 pF, VDD = 1.8 V to 2.7 V - 10 CL = 30 pF, VDD = 2.7 V to 3.6 V - 6 CL = 50 pF, VDD = 1.8 V to 2.
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STM32L010F4/K4 Electrical characteristics Table 51. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(NRST)(1) NRST input low level voltage - - - 0.3VDD VIH(NRST)(1) NRST input high level voltage - 0.39VDD+ 0.59 - - IOL = 2 mA 2.7 V < VDD < 3.6 V - - IOL = 1.5 mA 1.8 V < VDD < 2.7 V - - - - 10%VDD(2) - mV VOL(NRST)(1) NRST output low level voltage NRST Schmitt Vhys(NRST)(1) trigger voltage hysteresis V 0.
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Electrical characteristics STM32L010F4/K4 Table 52. ADC characteristics Symbol VDDA IDDA (ADC) fADC fS(3) fTRIG(3) Parameter Analog supply voltage for ADC ON Conditions Min Typ Max - - - 3.6 - 3.6 - (1) 1.8 Unit V Current consumption of the ADC on VDDA 1.14 Msps - 200 - 10 ksps - 40 - Current consumption of the ADC on VDD(2) 1.14 Msps - 70 - 10 ksps - 1 - Voltage scaling Range 1 0.14 - 16 Voltage scaling Range 2 0.14 - 8 Voltage scaling Range 3 0.
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STM32L010F4/K4 Electrical characteristics Table 52. ADC characteristics (continued) Symbol Parameter tSTAB(3) Power-up time tConV(3) Total conversion time (including sampling time) Conditions Min Typ Max Unit - 0 0 1 µs fADC = 16 MHz 0.875 - 10.81 µs 14 to 173 (tS for sampling +12.5 for successive approximation) - 1/fADC 1. VDDA minimum value can be decreased in specific temperature conditions. Refer to Table 53: RAIN max for fADC = 16 MHz. 2.
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Electrical characteristics STM32L010F4/K4 Table 54. ADC accuracy(1)(2)(3) Symbol Parameter Conditions Min Typ Max ET Total unadjusted error - 2 4 EO Offset error - 1 2.5 EG Gain error - 1 2 EL Integral linearity error - 1.5 2.5 ED Differential linearity error - 1 1.5 10.2 11 - 11.3 12.1 - Effective number of bits 1.8 V < VDDA < 3.
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STM32L010F4/K4 Electrical characteristics Figure 24. Typical connection diagram using the ADC 9''$ 97 5$,1 9$,1 $,1[ &SDUDVLWLF 97 6DPSOH DQG KROG $'& FRQYHUWHU 5$'& ELW FRQYHUWHU ,/ Q$ &$'& 06Y 9 1. Refer to Table 52: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value downgrades conversion accuracy.
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Electrical characteristics 6.3.17 STM32L010F4/K4 Communications interfaces I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for standard-mode (Sm) with a bit rate up to 100 kbit/s. The I2C timing requirements are guaranteed by design when the I2C peripheral is properly configured (refer to the reference manual for details) and when the I2CCLK frequency is greater than 2 MHz.
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STM32L010F4/K4 Electrical characteristics SPI characteristics Unless otherwise specified, the parameters given in the following tables are derived from tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 15. Refer to Section 6.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 57.
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Electrical characteristics STM32L010F4/K4 Table 58. SPI characteristics in voltage Range 2 (1) Symbol Parameter Conditions Min Typ Master mode fSCK 1/tc(SCK) SPI clock frequency Slave mode transmitter 1.8 V < VDD < 3.6 V Max 8 - - Slave mode transmitter 2.7 V < VDD < 3.
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STM32L010F4/K4 Electrical characteristics Table 59.
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Electrical characteristics STM32L010F4/K4 Figure 25. SPI timing diagram - slave mode and CPHA = 0 166 LQSXW WF 6&. WVX 166 WK 166 WZ 6&.+ WU 6&. 6&. LQSXW &3+$ &32/ &3+$ &32/ WD 62 WZ 6&./ WY 62 WK 62 )LUVW ELW 287 0,62 RXWSXW WI 6&. 1H[W ELWV 287 WGLV 62 /DVW ELW 287 WK 6, WVX 6, )LUVW ELW ,1 026, LQSXW 1H[W ELWV ,1 /DVW ELW ,1 06Y 9 Figure 26. SPI timing diagram - slave mode and CPHA = 1(1) 166 LQSXW WF 6&. WVX 166 WZ 6&.+ WD 62 WZ 6&./ WI 6&. WK 166 6&.
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STM32L010F4/K4 Electrical characteristics Figure 27. SPI timing diagram - master mode(1) +LJK 166 LQSXW 6&. 2XWSXW &3+$ &32/ 6&. 2XWSXW WF 6&. &3+$ &32/ &3+$ &32/ &3+$ &32/ WVX 0, 0,62 ,13 87 WZ 6&.+ WZ 6&./ 06% ,1 WU 6&. WI 6&. %,7 ,1 /6% ,1 WK 0, 026, 287387 06% 287 % , 7 287 WY 02 /6% 287 WK 02 DL G 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. DS12323 Rev 2 81/91 81 Downloaded from Arrow.com.
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Package information 7 STM32L010F4/K4 Package information In order to meet environmental requirements, ST offers the STM32L010F4/K4 in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at www.st.com. ECOPACK® is an ST trademark. 7.1 TSSOP20 package information Figure 28.TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.
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STM32L010F4/K4 Package information Table 60. TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch, package mechanical data (continued) inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - k 0° - 8° 0° - 8° aaa - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Dimension “D” does not include mold flash, protrusions or gate burrs.
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Package information STM32L010F4/K4 Device marking for TSSOP20 Figure 30 gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks depending on supply-chain operations, are not indicated below. Figure 30. TSSOP20 marking example (package top view) 3URGXFW LGHQWLILFDWLRQ / ) 3 3LQ LQGHQWLILHU 'DWH FRGH < :: 5HYLVLRQ FRGH 5 06Y 9 1.
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STM32L010F4/K4 7.2 Package information LQFP32 package information Figure 31. LQFP32 - 32-pin, 7 x 7 mm low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM CCC '!5'% 0,!.% # + $ ! , $ , $ 0). )$%.4)&)#!4)/. % % % B E 7@.&@7 1. Drawing is not to scale. DS12323 Rev 2 85/91 89 Downloaded from Arrow.com.
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Package information STM32L010F4/K4 Table 61. LQFP32 - 32-pin, 7 x 7 mm low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.600 - - 0.
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STM32L010F4/K4 Package information Device marking for LQFP32 Figure 33 gives an example of topside marking versus pin 1 position identifier location. Other optional marking or inset/upset marks depending on supply-chain operations, are not indicated below. Figure 33. LQFP32 marking example (package top view) 3URGXFW LGHQWLILFDWLRQ 670 / . 7 'DWH FRGH < :: 5HYLVLRQ FRGH 3LQ LQGHQWLILHU 5 06Y 9 1.
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Package information STM32L010F4/K4 Table 62. Thermal characteristics symbol ϴJA Thermal resistance junction-ambient Value TSSOP20 - 169 mils 74 LQFP32 - 7 x 7 mm / 0.8 mm pitch 60 Unit °C/W Reference document JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air). Available from www.jedec.org. 88/91 Downloaded from Arrow.com.
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STM32L010F4/K4 8 Ordering information Ordering information Table 63.
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Revision history 9 STM32L010F4/K4 Revision history Table 64. Document revision history 90/91 Downloaded from Arrow.com. Date Revision Changes 8-Dec-2017 1 Initial release. 3-Sep-2018 2 Updated Introduction. TSSOP14 removed in the whole document.
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STM32L010F4/K4 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.