Datasheet

DS12556 Rev 2 169/201
STM32H750VB STM32H750IB STM32H750XB Electrical characteristics
189
6.3.29 Camera interface (DCMI) timing specifications
Unless otherwise specified, the parameters given in Table 97 for DCMI are derived from
tests performed under the ambient temperature, f
rcc_c_ck
frequency and V
DD
supply
voltage summarized in
Table 22: General operating conditions, with the following
configuration:
• DCMI_PIXCLK polarity: falling
• DCMI_VSYNC and DCMI_HSYNC polarity: high
• Data formats: 14 bits
• Capacitive load C=30 pF
• Measurement points are done at CMOS levels: 0.5V
DD
Figure 40. DCMI timing diagram
Table 97. DCMI characteristics
(1)
1. Guaranteed by characterization results.
Symbol Parameter Min Max Unit
- Frequency ratio DCMI_PIXCLK/f
rcc_c_ck
-0.4 -
DCMI_PIXCLK Pixel clock input - 80 MHz
D
Pixel
Pixel clock input duty cycle 30 70 %
t
su(DATA)
Data input setup time 1 -
ns
t
h(DATA)
Data input hold time 1 -
t
su(HSYNC)
t
su(VSYNC)
DCMI_HSYNC/DCMI_VSYNC input setup time 1.5 -
t
h(HSYNC)
t
h(VSYNC)
DCMI_HSYNC/DCMI_VSYNC input hold time 1 -
MS32414V2
DCMI_PIXCLK
t
su(VSYNC)
t
su(HSYNC)
DCMI_HSYNC
DCMI_VSYNC
DATA[0:13]
1/DCMI_PIXCLK
t
h(HSYNC)
t
h(HSYNC)
t
su(DATA)
t
h(DATA)
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