Datasheet

Electrical characteristics STM32H750VB STM32H750IB STM32H750XB
150/201 DS12556 Rev 2
6.3.19 Delay block (DLYB) characteristics
Unless otherwise specified, the parameters given in Table 84 for the delay block are derived
from tests performed under the ambient temperature, f
rcc_c_ck
frequency and V
DD
supply
voltage summarized in
Table 22: General operating conditions.
6.3.20 16-bit ADC characteristics
Unless otherwise specified, the parameters given in Table 84 are derived from tests
performed under the ambient temperature, f
PCLK2
frequency and V
DDA
supply voltage
conditions summarized in
Table 22: General operating conditions.
Table 83. Dynamics characteristics: Delay Block characteristics
(1)
1. Guaranteed by characterization results.
Symbol Parameter Conditions Min Typ Max Unit
t
init
Initial delay - 1400 2200 2400
ps
t

Unit Delay - 35 40 45
Table 84. ADC characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
Analog power supply - 1.62 - 3.6
VV
REF+
Positive reference voltage
V
DDA
≥ 2 V 2 - V
DDA
V
DDA
< 2 V V
DDA
V
REF-
Negative reference voltage - V
SSA
f
ADC
ADC clock frequency 2 V ≤ V
DDA
≤ 3.3 V
BOOST = 1 - - 36
MHz
BOOST = 0 - - 20
f
S
Sampling rate for Fast
channels, BOOST = 1,
f
ADC
= 36 MHz
16-bit resolution - - 3.60
MSPS
14-bit resolution - - 4.00
12-bit resolution - - 4.50
10-bit resolution - - 5.00
8-bit resolution 6.00
Sampling rate for Fast
channels, BOOST = 0,
f
ADC
= 20 MHz
16-bit resolution - - 2.00
14-bit resolution - - 2.20
12-bit resolution - - 2.50
10-bit resolution - - 2.80
8-bit resolution 3.30
Sampling rate for Slow
channels, BOOST = 0,
f
ADC
= 10 MHz
16-bit resolution - - 1.00
14-bit resolution - - 1.00
12-bit resolution - - 1.00
10-bit resolution - - 1.00
8-bit resolution 1.00
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