Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 2MB LQFP

Functional overview STM32H743xI

40/226 DocID030538 Rev 3

All USART have a clock domain independent from the CPU clock, allowing the USARTx to

wake up the MCU from Stop mode.The wakeup from Stop mode are programmable and can

be done on:

• Start bit detection

• Any received data frame

• A specific programmed data frame

• Specific TXFIFO/RXFIFO status when FIFO mode is enabled.

All USART interfaces can be served by the DMA controller.

3.32 Low-power universal asynchronous receiver transmitter

(LPUART)

The device embeds one Low-Power UART (LPUART1). The LPUART supports

asynchronous serial communication with minimum power consumption. It supports half

duplex single wire communication and modem operations (CTS/RTS). It allows

multiprocessor communication.

The LPUARTs embed a Transmit FIFO (TXFIFO) and a Receive FIFO (RXFIFO). FIFO

de is enabled by software and is disabled by default.

Table 6. USART features

USART modes/features

(1)

1. X = supported.

USART1/2/3/6 UART4/5/7/8

Hardware flow control for modem X X

Continuous communication using DMA X X

Multiprocessor communication X X

Synchronous mode (Master/Slave) X -

Smartcard mode X -

Single-wire Half-duplex communication X X

IrDA SIR ENDEC block X X

LIN mode X X

Dual clock domain and wakeup from low power mode X X

Receiver timeout interrupt X X

Modbus communication X X

Auto baud rate detection X X

Driver Enable X X

USART data length 7, 8 and 9 bits

Tx/Rx FIFO X X

Tx/Rx FIFO size 16

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