Datasheet

DocID030538 Rev 3 181/226
STM32H743xI Electrical characteristics
196
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 102 for the SPI interface are
derived from tests performed under the ambient temperature, f
PCLKx
frequency and V
DD
supply voltage conditions summarized in Table 23: General operating conditions, with the
following configuration:
• Output speed
is set to OSPEEDRy[1:0] = 11
• Capacitive load C = 30 pF
• Measurement points are done at CMOS levels: 0.5V
DD
• I/O compensation cell enabled
• HSLV activated when VDD  2.7 V
Refer to Section 6.3.15: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS,
SCK, MOSI, MISO for SPI).
Table 102. SPI dynamic characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
f
SCK
1/t
c(SCK)
SPI clock frequency
Master mode
1.62 VV
DD
3.6 V
--
90
MHz
Master mode
2.7 VV
DD
3.6 V
SPI1,2,3
133
Master mode
2.7 VV
DD
3.6 V
SPI4,5,6
100
Slave receiver mode
1.62 VV
DD
3.6 V
SPI1,2,3
150
Slave receiver mode
1.62 VV
DD
3.6 V
SPI4,5,6
100
Slave mode transmitter/full
duplex
2.7 VV
DD
3.6 V
31
Slave mode transmitter/full
duplex
1.62 VV
DD
3.6 V
25
t
su(NSS)
NSS setup time
Slave mode
2--
ns
t
h(NSS)
NSS hold time 1 - -
t
w(SCKH)
,
t
w(SCKL)
SCK high and low time Master mode T
PLCK
- 2 T
PLCK
T
PLCK
+ 2
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