Datasheet

DocID030538 Rev 3 17/226
STM32H743xI Description
46
Figure 1. STM32H743xI block diagram
MSv41922V8
TT-FDCAN1
FDCAN2
I2C1/SMBUS
I2C2/SMBUS
I2C3/SMBUS
AXI/AHB12 (200MHz)
4 compl. chan. (TIM1_CH1[1:4]N),
4 chan. (TIM1_CH1[1:4]ETR, BKIN as AF
APB1 30MHz
TX, RX
SCL, SDA, SMBAL as AF
APB1 100 MHz (max)
MDMA
PK[7:0]
4 compl. chan.(TIM8_CH1[1:4]N),
4 chan. (TIM8_CH1[1:4], ETR,
BKIN as AF
RX, TX, SCK,
CTS, RTS as AF
SCL, SDA, SMBAL as AF
SCL, SDA, SMBAL as AF
MOSI, MISO, SCK, NSS /
SDO, SDI, CK, WS, MCK, as AF
TX, RX
RX, TX as AF
RX, TX as AF
RX, TX, SCK
CTS, RTS as AF
RX, TX, SCK, CTS,
RTS as AF
1 channel as AF
smcard
irDA
1 channel as AF
2 channels as AF
4 channels
4 channels, ETR as AF
4 channels, ETR as AF
4 channels, ETR as AF
RX, TX as AF
FIFO
LCD-TFT
FIFO
CHROM-ART
(DMA2D)
SD, SCK, FS, MCLK, D/CK[4:1] as
AF
FIFO
LCD_R[7:0], LCD_G[7:0],
LCD_B[7:0], LCD_HSYNC,
LCD_VSYNC, LCD_DE, LCD_CLK
CLK, CS,D[7:0]
64-bit AXI BUS-MATRIX
HDMI_CEC as AF
SPDIFRX[3:0] as AF
MDC, MDIO
AXIM
AXIM
Arm CPU
Cortex-M7
400 MHz
AHBP
AHBS
TRACECK
TRACED[3:0]
JTRST, JTDI,
JTCK/SWCLK
JTDO/SWD, JTDO
JTAG/SW
ETM
I-Cache
16KB
D-Cache
16KB
I-TCM
64KB
D-TCM
64KB
16 Streams
FIFO
SDMMC1
SDMMC_D[7:0],SDMMC_D[7:3,1]Dir
SDMMC_D0dir, SDMMC_D2dir
CMD, CMDdir, CK, Ckin,
CKio as AF
FIFO
DMA1
FIFOs
8 Stream
DMA2
FIFOs
ETHER
MAC
FIFO
SDMMC2
FIFO
OTG_HS
FIFO
OTG_FS
FIFO
SRAM1
128 KB
8 Stream
FMC_signals
DMA/ DMA/ DMA/
PHY PHY
MII / RMII
MDIO
as AF
DP, DM, STP,
NXT,ULPI:CK
, D[7:0], DIR,
ID, VBUS
AHB1 (200MHz)
ADC1
DAC_OUT1, DAC_OUT2 as AF
16b
AXI/AHB34 (200MHz)
JPEG
WWDG
AHB2 (200MHz)
AHB2 (200MHz)
PA..J[15:0]
HSYNC, VSYNC, PIXCLK, D[13:0]
SAI3
MOSI, MISO,
SCK, NSS as AF
MOSI, MISO, SCK, NSS as AF
smcard
irDA
32-bit AHB BUS-MATRIX
AHB4 (200MHz)
BDMA
DMA
Mux2
Up to 20 analog inputs
common to ADC1 & 2
HSEM
AHB4 (200MHz)
AHB3
AHB4
AHB4
AHB4
AHB4
AHB4
VDDA, VSSA
NRESET
WKUP[4:0]
@VDD
RCC
Reset &
control
OSC32_IN
OSC32_OUT
VBAT = 1.8 to 3.6 V
AWU
VDD12
BBgen + POWER MNGT
LS
LS
OSC_IN
OSC_OUT
RTC_TS
RTC_TAMP[1:3]
RTC_OUT
RTC_REFIN
VDDMMC33 = 1.8 to 3.6V
VDDUSB33 = 3.0 to 3.6 V
VDD = 1.8 to 3.6 V
VSS
VCAP1/2/3
@VDD
@VDD33
@VSW
PWRCTRL
AHB4 (200MHz)
SUPPLY SUPERVISION
Int
POR
reset
@VDD
WDG_LS_D1
LPTIM1_IN1, LPTIM1_IN2,
LPTIM1_OUT as AF
OPAMPx_VINM
OPAMPx_VINP
OPAMPx_VOUT as AF
HRTIM1_CH[A..E]x
HRTIM1_FLT[5:1],
HRTIM1_FLT[5:1]_in, SYSFLT
DFSDM_CKOUT,
DFSDM_DATAIN[0:7],
DFSDM_CKIN[0:7]
2 compl. chan.(TIM15_CH1[1:2]N),
2 chan. (TIM_CH15[1:2], BKIN as AF
1 compl. chan.(TIM16_CH1N),
1 chan. (TIM16_CH1, BKIN as AF
1 compl. chan.(TIM17_CH1N),
1 chan. (TIM17_CH1, BKIN as AF
SDMMC_
D[7:0],
CMD, CK as AF
Up to 17 analog inputs
common to ADC1 and 2
SD, SCK, FS, MCLK,
D[3;1], CK[2:1] as AF
SCL, SDA, SMBAL as AF
COMPx_INP, COMPx_INM,
COMPx_OUT as AF
LPTIM5_OUT as AF
D-TCM
64KB
AHB/APB
Quad-SPI
1 MB FLASH
1 MB FLASH
512 KB AXI
SRAM
FMC
Delay block
DCMI
AHB/APB
HRTIM1
DFSDM
SD, SCK, FS, MCLK, CK[2:1] as AF
FIFO
SAI2
SD, SCK, FS, MCLK, D[3:1],
CK[2:1] as AF
FIFO
SAI1
SPI5
TIM17
TIM16
TIM15
SPI4
MOSI, MISO, SCK, NSS /
SDO, SDI, CK, WS, MCK, as AF
SPI1/I2S1
USART6
RX, TX, SCK,
CTS, RTS as AF
irDA
USART1
TIM1/PWM
16b
TIM8/PWM
16b
APB2 100 MHz (max)
ADC3
GPIO PORTA.. J
GPIO PORTK
SAI4
COMP1&2
LPTIM5
LPTIM4_OUT as AF
LPTIM4
LPTIM3_OUT as AF
LPTIM3
I2C4
MOSI, MISO, SCK, NSS /
SDO, SDI, CK, WS, MCK, as AF
SPI6/I2S6
RX, TX, CK, CTS, RTS as AF
LPUART1
LPTIM2
Tamper monitor
VREF
SYSCFG
EXTI WKUP
CRC
DAP
RNG
DMA
Mux1
To APB1-2
peripherals
SRAM2
128 KB
SRAM3
32 KB
ADC2
AHB/APB
TIM6
16b
TIM7
16b
SWPMI
TIM2
32b
TIM3
16b
TIM4
16b
TIM5
32b
TIM12
16b
TIM13
16b
TIM14
16b
USART2
smcard
irDA
USART3
UART4
UART5
UART7
RX, TX as AF
UART8
SPI2/I2S2
MOSI, MISO, SCK, NSS /
SDO, SDI, CK, WS, MCK, as AF
SPI3/I2S3
Digital filter
MDIOs
FIFO
10 KB SRAM
RAM
I/F
USBCR
SPIFRX
HDMI-CEC
DAC
LPTIM1
OPAMP1&2
AHB/APB
XTAL 32 kHz
RTC
Backup registers
XTAL OSC
4- 48 MHz
HS RC
LS RC
PLL1+PLL2+PLL3
POR/PDR/BOR
PVD
smcard
Voltage
regulator
3.3 to 1.2V
LSI
HSI
CSI
HSI48
LPTIM2_IN1, LPTIM2_IN2 and
LPTIM2_OUT
AHB1 (200MHz)
DP, DM, ID,
VBUS
64 KB SRAM
4 KB BKP
RAM
AHB4
32-bit AHB BUS-MATRIX
APB4 100 MHz (max)
APB4 100 MHz (max)
APB4 100 MHz (max)
IWDG
Temperature
sensor
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