Datasheet
Pinouts and pin description STM32F765xx STM32F767xx STM32F768Ax STM32F769xx
90/255 DocID029041 Rev 6
Port B
PB7 - -
TIM4_C
H2
-
I2C1_SD
A
-
DFSDM1
_CKIN5
USART1
_RX
-- -
I2S4_SD
A
FMC_NL
DCMI_V
SYNC
-
EVEN
TOUT
PB8 -
I2C4_SC
L
TIM4_C
H3
TIM10_C
H1
I2C1_SC
L
-
DFSDM1
_CKIN7
UART5_
RX
-
CAN1_R
X
SDMMC2
_D4
ETH_MII_
TXD3
SDMMC
_D4
DCMI_D
6
LCD_B6
EVEN
TOUT
PB9 -
I2C4_SD
A
TIM4_C
H4
TIM11_CH
1
I2C1_SD
A
SPI2_NS
S/I2S2_
WS
DFSDM1
_DATIN7
UART5_T
X
-
CAN1_T
X
SDMMC2
_D5
I2C4_SM
BA
SDMMC
_D5
DCMI_D
7
LCD_B7
EVEN
TOUT
PB10 -
TIM2_C
H3
--
I2C2_SC
L
SPI2_SC
K/I2S2_
CK
DFSDM1
_DATIN7
USART3
_TX
-
-
QUADSP
I_BK1_N
CS
OTG_HS_
ULPI_D3
ETH_MII_
RX_ER
- - LCD_G4
EVEN
TOUT
PB11 -
TIM2_C
H4
--
I2C2_SD
A
-
DFSDM1
_CKIN7
USART3
_RX
--
OTG_HS_
ULPI_D4
ETH_MII_
TX_EN/E
TH_RMII_
TX_EN
- DSI_TE LCD_G5
EVEN
TOUT
PB12 -
TIM1_B
KIN
--
I2C2_SM
BA
SPI2_NS
S/I2S2_
WS
DFSDM1
_DATIN1
USART3
_CK
UART5_
RX
CAN2_R
X
OTG_HS_
ULPI_D5
ETH_MII_
TXD0/ET
H_RMII_T
XD0
OTG_HS
_ID
--
EVEN
TOUT
PB13 -
TIM1_C
H1N
-- -
SPI2_SC
K/I2S2_
CK
DFSDM1
_CKIN1
USART3
_CTS
UART5_T
X
CAN2_T
X
OTG_HS_
ULPI_D6
ETH_MII_
TXD1/ET
H_RMII_T
XD1
---
EVEN
TOUT
PB14 -
TIM1_C
H2N
-
TIM8_CH
2N
USART1_
TX
SPI2_MI
SO
DFSDM1
_DATIN2
USART3
_RTS
UART4_
RTS
TIM12_C
H1
SDMMC2
_D0
-
OTG_HS
_DM
--
EVEN
TOUT
PB15
RTC_RE
FIN
TIM1_C
H3N
-
TIM8_CH
3N
USART1_
RX
SPI2_M
OSI/I2S2
_SD
DFSDM1
_CKIN2
-
UART4_
CTS
TIM12_C
H2
SDMMC2
_D1
-
OTG_HS
_DP
--
EVEN
TOUT
Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate
function mapping (continued)
Port
AF0 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF15
SYS
I2C4/UA
RT5/TIM
1/2
TIM3/4/5
TIM8/9/10/
11/LPTIM
1/DFSDM
1/CEC
I2C1/2/3/
4/USART
1/CEC
SPI1/I2S
1/SPI2/I2
S2/SPI3/
I2S3/SPI
4/5/6
SPI2/I2S
2/SPI3/I2
S3/SAI1/
I2C4/UA
RT4/DF
SDM1
SPI2/I2S
2/SPI3/I2
S3/SPI6/
USART1/
2/3/UART
5/DFSDM
1/SPDIF
SPI6/SAI
2/USART
6/UART4/
5/7/8/OT
G_FS/SP
DIF
CAN1/2/T
IM12/13/
14/QUAD
SPI/FMC/
LCD
SAI2/QU
ADSPI/S
DMMC2/D
FSDM1/O
TG2_HS/
OTG1_FS
/LCD
I2C4/CAN
3/SDMM
C2/ETH
UART7/
FMC/SD
MMC1/M
DIOS/OT
G2_FS
DCMI/L
CD/DSI
LCD SYS
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