Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 2MB TFBGA

DocID029041 Rev 6 7/255

STM32F765xx STM32F767xx STM32F768Ax STM32F769xx List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Table 2. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx features and

peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 3. Voltage regulator configuration mode versus device operating mode . . . . . . . . . . . . . . . . 32

Table 4. Regulator ON/OFF and internal reset ON/OFF availability. . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 5. Voltage regulator modes in stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 6. Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 7. I2C implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Table 8. USART implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Table 9. DFSDM implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Table 10. Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Table 11. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx pin and

ball definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Table 12. FMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate

function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Table 14. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx register

boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Table 15. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

Table 16. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Table 17. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Table 18. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Table 19. Limitations depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . 114

Table 20. VCAP1/VCAP2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Table 21. Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . 115

Table 22. Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . 115

Table 23. Reset and power control block characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

Table 24. Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

Table 25. Typical and maximum current consumption in Run mode, code with data processing

running from ITCM RAM, regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Table 26. Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (Single bank mode, ART ON except prefetch / L1-cache ON)

or SRAM on AXI (L1-cache ON), regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

Table 27. Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (Dual bank mode, ART ON except prefetch / L1-cache ON),

regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

Table 28. Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (Single bank mode) or SRAM on AXI (L1-cache disabled),

regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

Table 29. Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (Dual bank mode), regulator ON . . . . . . . . . . . . . . . . . . . . . 122

Table 30. Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (Single bank mode) on ITCM interface (ART disabled),

regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

Table 31. Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (Dual bank mode) on ITCM interface (ART disabled),

regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

Table 32. Typical and maximum current consumption in Run mode, code with data processing

Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.