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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx Functional overview

2.3 Embedded Flash memory

The STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx devices embed a

Flash memory of up to 2 Mbytes available for storing programs and data. The Flash

interface features:

• Single /or Dual bank operating modes,

• Read-While-Write (RWW) in Dual bank mode.

2.4 CRC (cyclic redundancy check) calculation unit

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at link-

time and stored at a given memory location.

2.5 Embedded SRAM

All the devices feature:

• System SRAM up to 512 Kbytes:

– SRAM1 on AHB bus Matrix: 368 Kbytes

– SRAM2 on AHB bus Matrix: 16 Kbytes

– DTCM-RAM on TCM interface (Tighly Coupled Memory interface): 128 Kbytes for

critical real-time data.

• Instruction RAM (ITCM-RAM) 16 Kbytes:

– It is mapped on TCM interface and reserved only for CPU Execution/Instruction

useful for critical real-time routines.

The Data TCM RAM is accessible by the GP-DMAs and peripherals DMAs through specific

AHB slave of the CPU.The instruction TCM RAM is reserved only for CPU. It is accessed at

CPU clock speed with 0 wait states.

• 4 Kbytes of backup SRAM

This area is accessible only from the CPU. Its content is protected against possible

unwanted write accesses, and is retained in Standby or V

BAT mode.

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