Datasheet
DocID029041 Rev 6 217/255
STM32F765xx STM32F767xx STM32F768Ax STM32F769xx Electrical characteristics
220
t
wh(CKIN)
t
wl(CKIN)
Input clock high
and low time
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.71 < V
DD
< 3.6 V
TCKIN/2 - 0.5 T
CKIN
/2 -
ns
t
su
Data input setup
time
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.71 < V
DD
< 3.6 V
2--
t
h
Data input hold
time
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.71 < V
DD
< 3.6 V
3--
T
Manchester
Manchester data
period (recovered
clock period)
Manchester mode
(SITP[1:0]=2,3),
Internal clock mode
(SPICKSEL[1:0]
≠0),
1.71 < V
DD
< 3.6 V
(CKOUTDIV+1)
* T
DFSDMCLK
-
(2*CKOUTDIV)
* T
DFSDMCLK
Table 123. DFSDM measured timing 1.71-3.6V (continued)
Symbol Parameter Conditions Min Typ Max Unit
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