Datasheet

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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx Electrical characteristics
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Figure 36. PLL output clock waveforms in down spread mode
5.3.13 MIPI D-PHY characteristics
The parameters given in Table 52 and Table 53 are derived from tests performed under
temperature and V
DD
supply voltage conditions summarized in Table 18.
)UHTXHQF\3//B287
7LPH
)
WPRGH [WPRGH
[PG
DLE
Table 52. MIPI D-PHY characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
Hi-Speed Input/Output Characteristics
U
INST
UI instantaneous - 2 - 12.5 ns
V
CMTX
HS transmit common mode
voltage
- 150 200 250
mV
|V
CMTX
|
V
CMTX
mismatch when output
is Differential-1 or Differential-0
---5
|V
OD
| HS transmit differential voltage - 140 200 270
|V
OD
|
V
OD
mismatch when output is
Differential-1 or Differential-0
---14
V
OHHS
HS output high voltage - - - 360
Z
OS
Single ended output
impedance
-405062.5
Z
OS
Single ended output
impedance mismatch
---10%
t
HSr
& t
HSf
20%-80% rise and fall time - 100 - 0.35*UI ps
LP Receiver Input Characteristics
V
IL
Logic 0 input voltage (not in
ULP State)
---550
mV
V
IL-ULPS
Logic 0 input voltage in ULP
State
---300
V
IH
Input high level voltage - 880 - -
V
hys
Voltage hysteresis - 25 - -
LP Emitter Output Characteristics
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