Datasheet
Pinouts and pin description STM32F745xx STM32F746xx
72/227 DocID027590 Rev 4
- - - - C3 175 207 D6 PI6 I/O FT -
TIM8_CH2, SAI2_SD_A,
FMC_D28, DCMI_D6,
LCD_B6, EVENTOUT
-
- - - - C2 176 208 D4 PI7 I/O FT -
TIM8_CH3, SAI2_FS_A,
FMC_D29, DCMI_D7,
LCD_B7, EVENTOUT
-
1. Function availability depends on the chosen device.
2. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited amount of current
(3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited:
- The speed should not exceed 2 MHz with a maximum load of 30 pF.
- These I/Os must not be used as a current source (e.g. to drive an LED).
3. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F75xxx and STM32F74xxx reference manual.
4. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
5. If the device is delivered in an WLCSP143, UFBGA176, LQFP176, TFBGA100 or TFBGA216 package, and the
BYPASS_REG pin is set to V
DD (Regulator OFF/internal reset ON mode), then PA0 is used as an internal Reset (active
low).
Table 10. STM32F745xx and STM32F746xx pin and ball definition (continued)
Pin Number
Pin
name
(function
after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
LQFP100
TFBGA100
WLCSP143
LQFP144
UFBGA176
LQFP176
LQFP208
TFBGA216
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