Datasheet
DocID027590 Rev 4 71/227
STM32F745xx STM32F746xx Pinouts and pin description
88
95 B4 A9 139 A5 167 198 A7 PB8 I/O FT -
TIM4_CH3, TIM10_CH1,
I2C1_SCL, CAN1_RX,
ETH_MII_TXD3,
SDMMC1_D4, DCMI_D6,
LCD_B6, EVENTOUT
-
96 A4 B9 140 B4 168 199 B4 PB9 I/O FT -
TIM4_CH4, TIM11_CH1,
I2C1_SDA,
SPI2_NSS/I2S2_WS,
CAN1_TX, SDMMC1_D5,
DCMI_D7, LCD_B7,
EVENTOUT
-
97 D4 B10 141 A4 169 200 A6 PE0 I/O FT -
TIM4_ETR,
LPTIM1_ETR,
UART8_Rx,
SAI2_MCK_A,
FMC_NBL0, DCMI_D2,
EVENTOUT
-
98 C4 A10 142 A3 170 201 A5 PE1 I/O FT -
LPTIM1_IN2, UART8_Tx,
FMC_NBL1, DCMI_D3,
EVENTOUT
-
99 E4 - - D5 - 202 F6 VSS S - - - -
- F7 A11 143 C6 171 203 E5 PDR_ON S - - - -
100 F4 D7 144 C5 172 204 E7 VDD S - - - -
- - - - D4 173 205 C3 PI4 I/O FT -
TIM8_BKIN,
SAI2_MCK_A,
FMC_NBL2, DCMI_D5,
LCD_B4, EVENTOUT
-
- - - - C4 174 206 D3 PI5 I/O FT -
TIM8_CH1,
SAI2_SCK_A,
FMC_NBL3,
DCMI_VSYNC, LCD_B5,
EVENTOUT
-
Table 10. STM32F745xx and STM32F746xx pin and ball definition (continued)
Pin Number
Pin
name
(function
after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
LQFP100
TFBGA100
WLCSP143
LQFP144
UFBGA176
LQFP176
LQFP208
TFBGA216
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