Datasheet
Pinouts and pin description STM32F745xx STM32F746xx
60/227 DocID027590 Rev 4
- - - - - - 67 P7 PJ2 I/O FT - LCD_R3, EVENTOUT -
- - - - - - 68 N8 PJ3 I/O FT - LCD_R4, EVENTOUT -
- - - - - - 69 M9 PJ4 I/O FT - LCD_R5, EVENTOUT -
- - M7 49 R6 59 70 P8 PF11 I/O FT -
SPI5_MOSI, SAI2_SD_B,
FMC_SDNRAS,
DCMI_D12, EVENTOUT
-
- - N7 50 P6 60 71 M6 PF12 I/O FT - FMC_A6, EVENTOUT -
- - - 51M861 72K7 VSS S - - - -
-- -52N86273L8VDDS-- - -
- - K6 53 N6 63 74 N6 PF13 I/O FT -
I2C4_SMBA, FMC_A7,
EVENTOUT
-
- - L6 54 R7 64 75 P6 PF14 I/O FT -
I2C4_SCL, FMC_A8,
EVENTOUT
-
- - M6 55 P7 65 76 M8 PF15 I/O FT -
I2C4_SDA, FMC_A9,
EVENTOUT
-
- - N6 56 N7 66 77 N7 PG0 I/O FT - FMC_A10, EVENTOUT -
- - K5 57 M7 67 78 M7 PG1 I/O FT - FMC_A11, EVENTOUT -
37 H5 L5 58 R8 68 79 R8 PE7 I/O FT -
TIM1_ETR, UART7_Rx,
QUADSPI_BK2_IO0,
FMC_D4, EVENTOUT
-
38 J5 M5 59 P8 69 80 N9 PE8 I/O FT -
TIM1_CH1N, UART7_Tx,
QUADSPI_BK2_IO1,
FMC_D5, EVENTOUT
-
39 K5 N5 60 P9 70 81 P9 PE9 I/O FT -
TIM1_CH1, UART7_RTS,
QUADSPI_BK2_IO2,
FMC_D6, EVENTOUT
-
- - H3 61 M9 71 82 K8 VSS S - - - -
- - J5 62 N9 72 83 L9 VDD S - - - -
40 G6 J4 63 R9 73 84 R9 PE10 I/O FT -
TIM1_CH2N,
UART7_CTS,
QUADSPI_BK2_IO3,
FMC_D7, EVENTOUT
-
Table 10. STM32F745xx and STM32F746xx pin and ball definition (continued)
Pin Number
Pin
name
(function
after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
LQFP100
TFBGA100
WLCSP143
LQFP144
UFBGA176
LQFP176
LQFP208
TFBGA216
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