Datasheet
Pinouts and pin description STM32F745xx STM32F746xx
54/227 DocID027590 Rev 4
4 D3 D9 4 B2 4 4 B1 PE5 I/O FT -
TRACED2, TIM9_CH1,
SPI4_MISO,
SAI1_SCK_A, FMC_A21,
DCMI_D6, LCD_G0,
EVENTOUT
-
5 E3 E8 5 B3 5 5 B2 PE6 I/O FT -
TRACED3, TIM1_BKIN2,
TIM9_CH2, SPI4_MOSI,
SAI1_SD_A,
SAI2_MCK_B, FMC_A22,
DCMI_D7, LCD_G1,
EVENTOUT
-
- - - - - - - G6 VSS S - - - -
-- -----F5VDDS-- - -
6B2C116C16 6C1 VBAT S-- - -
- - - - D2 7 7 C2 PI8 I/O FT
(2)
(3)
EVENTOUT
RTC_TAMP2/
RTC_TS,WK
UP5
7A2D107D18 8D1 PC13I/OFT
(2)
(3)
EVENTOUT
RTC_TAMP1/
RTC_TS/RTC
_OUT,WKUP
4
8A1D118E19 9E1
PC14-
OSC32_I
N(PC14)
I/O FT
(2)
(3)
EVENTOUT OSC32_IN
9B1E119F11010F1
PC15-
OSC32_
OUT(PC
15)
I/O FT
(2)
(3)
EVENTOUT OSC32_OUT
-- -----G5VDDS-- - -
- - - - D3 11 11 E4 PI9 I/O FT -
CAN1_RX, FMC_D30,
LCD_VSYNC,
EVENTOUT
-
- - - - E3 12 12 D5 PI10 I/O FT -
ETH_MII_RX_ER,
FMC_D31, LCD_HSYNC,
EVENTOUT
-
Table 10. STM32F745xx and STM32F746xx pin and ball definition (continued)
Pin Number
Pin
name
(function
after
reset)
(1)
Pin type
I/O structure
Notes
Alternate functions
Additional
functions
LQFP100
TFBGA100
WLCSP143
LQFP144
UFBGA176
LQFP176
LQFP208
TFBGA216
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